Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.209, 5.30mm Width) |
Number of Pins |
14 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2011 |
Series |
74LCX |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74LCX74 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Clock Frequency |
150MHz |
Propagation Delay |
8 ns |
Turn On Delay Time |
1.5 ns |
Family |
LVC/LCX/Z |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
10μA |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
7ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
7 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
7pF |
Number of Output Lines |
1 |
Clock Edge Trigger Type |
Positive Edge |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC74LCX74MELG Overview
In the form of 14-SOIC (0.209, 5.30mm Width), it has been packaged. The package Tape & Reel (TR)contains it. As configured, the output uses Differential. The trigger it is configured with uses Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~3.6V volts. A temperature of -40°C~85°C TAis used in the operation. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74LCXseries FPGA. It should not exceed 150MHzin its output frequency. T flip flop consumes 10μA quiescent energy. The number of terminations is 14. Members of the 74LCX74family make up this object. It is powered by a voltage of 2.5V . This T flip flop has a capacitance of 7pF farads at the input. LVC/LCX/Zis the family of this D flip flop. In this case, the electronic component is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 14. This device's clock edge trigger type is Positive Edge. It is included in FF/Latches. Vsup reaches its maximum value at 3.6V. For normal operation, the supply voltage (Vsup) should be kept above 2V. The superior flexibility of this product is achieved by using 2 circuits. This D flip flop is well suited for TAPE AND REEL based on its reliable performance. The D latch runs on a voltage of 3.3V volts. In order to operate, the chip has 1 output lines.
MC74LCX74MELG Features
Tape & Reel (TR) package
74LCX series
14 pins
3.3V power supplies
MC74LCX74MELG Applications
There are a lot of ON Semiconductor MC74LCX74MELG Flip Flops applications.
- QML qualified product
- Bus hold
- ATE
- Frequency division
- Balanced 24 mA output drivers
- Buffered Clock
- Storage registers
- 2 – Bit synchronous counter
- Storage Registers
- Automotive