Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2012 |
Series |
74LVX |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74LVX374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
95MHz |
Propagation Delay |
19.8 ns |
Turn On Delay Time |
6.7 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
4mA 4mA |
Max I(ol) |
0.004 A |
Max Propagation Delay @ V, Max CL |
14.1ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
55000000Hz |
Height Seated (Max) |
2.05mm |
Width |
5.275mm |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC74LVX374MG Overview
It is embeded in 20-SOIC (0.209, 5.30mm Width) case. It is contained within the Tubepackage. There is a Tri-State, Non-Invertedoutput configured with it. The trigger it is configured with uses Positive Edge. There is an electric part mounted in the way of Surface Mount. A voltage of 2V~3.6Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. There is D-Type type of electronic flip flop associated with this device. FPGAs belonging to the 74LVXseries contain this type of chip. You should not exceed 95MHzin the output frequency of the device. In total, there are 1 elements. This process consumes 4μA quiescents. It has been determined that there have been 20 terminations. JK flip flop belongs to 74LVX374 family. The power supply voltage is 2.7V. Its input capacitance is 4pFfarads. LV/LV-A/LVX/His the family of this D flip flop. In this case, the electronic component is mounted in the way of Surface Mount. This board is designed with 20pins on it. A Positive Edgeclock edge trigger is used in this device. This part is included in FF/Latches. An electronic part designed with 8bits is used in this application. For normal operation, the supply voltage (Vsup) should be above 2V. The superior flexibility is achieved through the use of 8 circuits. In light of its reliable performance, this T flip flop is well suited for RAIL. There are 2 ports embedded in the flip flops. The JK flip flop is with 3 output lines to operate.
MC74LVX374MG Features
Tube package
74LVX series
20 pins
8 Bits
MC74LVX374MG Applications
There are a lot of ON Semiconductor MC74LVX374MG Flip Flops applications.
- Reduced system switching noise
- Dynamic threshold performance
- Individual Asynchronous Resets
- EMI reduction circuitry
- Divide a clock signal by 2 or 4
- Buffered Clock
- Memory
- Storage Registers
- 2 – Bit synchronous counter
- Frequency division