Parameters |
Polarity |
Non-Inverting |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
75MHz |
Propagation Delay |
18 ns |
Turn On Delay Time |
8.5 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
4mA 4mA |
Max I(ol) |
0.004 A |
Max Propagation Delay @ V, Max CL |
16.7ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
45000000Hz |
Length |
6.5mm |
Width |
4.4mm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2011 |
Series |
74LVX |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Terminal Pitch |
0.65mm |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74LVX574 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
MC74LVX574DT Overview
20-TSSOP (0.173, 4.40mm Width)is the packaging method. D flip flop is embedded in the Tube package. Currently, the output is configured to use Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. Surface Mountmounts this electrical part. The JK flip flop operates with an input voltage of 2V~3.6V volts. -40°C~85°C TAis the operating temperature. This logic flip flop is classified as type D-Type. In FPGA terms, D flip flop is a type of 74LVXseries FPGA. You should not exceed 75MHzin the output frequency of the device. In total, there are 1 elements. As a result, it consumes 4μA quiescent current. 20terminations have occurred. Members of the 74LVX574family make up this object. A voltage of 2.7V is used as the power supply for this D latch. This T flip flop has a capacitance of 4pF farads at the input. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. It is mounted by the way of Surface Mount. A total of 20pins are provided on this board. In this device, the clock edge trigger type is Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. The design is based on 8bits. The supply voltage (Vsup) should be maintained above 2V for normal operation. Due to its superior flexibility, it uses 8 circuits. Due to its reliability, this T flip flop is well suited for RAIL. The flip flop has 2ports embedded within it. It operates with 3 output lines.
MC74LVX574DT Features
Tube package
74LVX series
20 pins
8 Bits
MC74LVX574DT Applications
There are a lot of ON Semiconductor MC74LVX574DT Flip Flops applications.
- Set-reset capability
- Asynchronous counter
- EMI reduction circuitry
- Circuit Design
- Shift registers
- Buffered Clock
- Single Up Count-Control Line
- Convert a momentary switch to a toggle switch
- Parallel data storage
- Memory