Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
14 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2011 |
Series |
74LVX |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
2V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.7V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74LVX74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Power Supplies |
3.3V |
Supply Voltage-Min (Vsup) |
2V |
Load Capacitance |
50pF |
Number of Bits |
1 |
Clock Frequency |
85MHz |
Propagation Delay |
18.5 ns |
Turn On Delay Time |
5.7 ns |
Family |
LV/LV-A/LVX/H |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
2μA |
Current - Output High, Low |
4mA 4mA |
Max I(ol) |
0.004 A |
Max Propagation Delay @ V, Max CL |
13.2ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Input Lines |
1 |
fmax-Min |
80 MHz |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
50000000Hz |
Length |
5mm |
Width |
4.4mm |
Radiation Hardening |
No |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
MC74LVX74DT Overview
The flip flop is packaged in 14-TSSOP (0.173, 4.40mm Width). A package named Tubeincludes it. In the configuration, Differentialis used as the output. JK flip flop uses Positive Edgeas the trigger. The electronic part is mounted in the way of Surface Mount. It operates with a supply voltage of 2V~3.6V. The operating temperature is -40°C~85°C TA. It belongs to the type D-Typeof flip flops. In terms of FPGAs, it belongs to the 74LVX series. You should not exceed 85MHzin its output frequency. The list contains 2 elements. T flip flop consumes 2μA quiescent energy. There are 14 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This D latch belongs to the family of 74LVX74. Power is supplied from a voltage of 2.7V volts. Input capacitance of this device is 4pF farads. A device of this type belongs to the family of LV/LV-A/LVX/H. There is an electronic part mounted in the way of Surface Mount. 14pins are included in its design. This device has the clock edge trigger type of Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. This flip flop is designed with 1 Bits. It reaches the maximum supply voltage (Vsup) at 3.6V. Normally, the supply voltage (Vsup) should be kept above 2V. As a result of its reliable performance, this T flip flop is suitable for RAIL. In order for the device to operate, it requires 3.3V power supplies. This input has 1lines.
MC74LVX74DT Features
Tube package
74LVX series
14 pins
1 Bits
3.3V power supplies
MC74LVX74DT Applications
There are a lot of ON Semiconductor MC74LVX74DT Flip Flops applications.
- Cold spare funcion
- Automotive
- Differential Individual
- Data Synchronizers
- ESD performance
- Buffer registers
- Computers
- Pattern generators
- ESCC
- Bus hold