MC74LVX74M
| Parameters | |
|---|---|
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | CMOS |
| Voltage - Supply | 2V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 2.7V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74LVX74 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 2V |
| Load Capacitance | 50pF |
| Number of Bits | 1 |
| Clock Frequency | 85MHz |
| Propagation Delay | 18.5 ns |
| Turn On Delay Time | 5.7 ns |
| Family | LV/LV-A/LVX/H |
| Logic Function | AND, D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 2μA |
| Current - Output High, Low | 4mA 4mA |
| Max I(ol) | 0.004 A |
| Max Propagation Delay @ V, Max CL | 13.2ns @ 3.3V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Number of Input Lines | 1 |
| fmax-Min | 80 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 50000000Hz |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.209, 5.30mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Published | 2012 |
| Series | 74LVX |
MC74LVX74M Overview
The flip flop is packaged in 14-SOIC (0.209, 5.30mm Width). It is included in the package Tube. As configured, the output uses Differential. Positive Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. A 2V~3.6Vsupply voltage is required for it to operate. It is operating at a temperature of -40°C~85°C TA. The type of this D latch is D-Type. It belongs to the 74LVXseries of FPGAs. Its output frequency should not exceed 85MHz. D latch consists of 2 elements. This process consumes 2μA quiescents. There are 14 terminations,This D latch belongs to the family of 74LVX74. It is powered by a voltage of 2.7V . Its input capacitance is 4pFfarads. It belongs to the family of electronic devices known as LV/LV-A/LVX/H. There is an electronic part mounted in the way of Surface Mount. There are 14pins on it. Its clock edge trigger type is Positive Edge. This RS flip flops is a part number FF/Latches. The flip flop is designed with 1bits. 3.6Vis the maximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be above 2V. On the basis of its reliable performance, this D flip flop is well suited for use with RAIL. An electrical current of 3.3V volts is applied to it. There are 1 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
MC74LVX74M Features
Tube package
74LVX series
14 pins
1 Bits
3.3V power supplies
MC74LVX74M Applications
There are a lot of ON Semiconductor MC74LVX74M Flip Flops applications.
- Buffered Clock
- ESCC
- Single Down Count-Control Line
- High Performance Logic for test systems
- Latch-up performance
- Shift registers
- Test & Measurement
- Computers
- Functionally equivalent to the MC10/100EL29
- QML qualified product
