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MC74VHC74MELG

2V~5.5V 115MHz D-Type Flip Flop 2μA 74VHC Series 14-SOIC (0.209, 5.30mm Width)


  • Manufacturer: Rochester Electronics, LLC
  • Nocochips NO: 699-MC74VHC74MELG
  • Package: 14-SOIC (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 595
  • Description: 2V~5.5V 115MHz D-Type Flip Flop 2μA 74VHC Series 14-SOIC (0.209, 5.30mm Width)(Kg)

Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 14-SOIC (0.209, 5.30mm Width)
Supplier Device Package SOEIAJ-14
Operating Temperature -55°C~125°C TA
Packaging Tape & Reel (TR)
Series 74VHC
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Type D-Type
Voltage - Supply 2V~5.5V
Function Set(Preset) and Reset
Output Type Differential
Number of Elements 2
Clock Frequency 115MHz
Current - Quiescent (Iq) 2μA
Current - Output High, Low 8mA 8mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 9.3ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
RoHS Status ROHS3 Compliant

MC74VHC74MELG Overview


It is packaged in the way of 14-SOIC (0.209, 5.30mm Width). A package named Tape & Reel (TR)includes it. T flip flop uses Differentialas its output configuration. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis occupied by this electronic component. With a supply voltage of 2V~5.5V volts, it operates. -55°C~125°C TAis the operating temperature. Logic flip flops of this type are classified as D-Type. The FPGA belongs to the 74VHC series. In order for it to function properly, its output frequency should not exceed 115MHz. In total, it contains 2 elements. As a result, it consumes 2μA of quiescent current without being affected by external factors. There is 4pF input capacitance for this T flip flop.

MC74VHC74MELG Features


Tape & Reel (TR) package
74VHC series

MC74VHC74MELG Applications


There are a lot of Rochester Electronics, LLC MC74VHC74MELG Flip Flops applications.

  • ESD performance
  • Balanced 24 mA output drivers
  • Differential Individual
  • Consumer
  • Buffered Clock
  • ATE
  • Frequency division
  • Divide a clock signal by 2 or 4
  • Latch-up performance
  • Balanced Propagation Delays

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