Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Number of Pins |
20 |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2011 |
Series |
74VHCT |
JESD-609 Code |
e4 |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
RAIL |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
40 |
Base Part Number |
74VHCT374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
130MHz |
Propagation Delay |
10.4 ns |
Turn On Delay Time |
4.1 ns |
Family |
AHCT/VHCT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
8mA 8mA |
Max Propagation Delay @ V, Max CL |
10.4ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
95000000Hz |
Height Seated (Max) |
2.05mm |
Width |
5.275mm |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MC74VHCT374AMELG Overview
It is embeded in 20-SOIC (0.209, 5.30mm Width) case. There is an embedded version in the package Tape & Reel (TR). T flip flop uses Tri-State, Non-Invertedas the output. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at 4.5V~5.5Vvolts. Temperature is set to -40°C~85°C TA. The type of this D latch is D-Type. JK flip flop is a part of the 74VHCTseries of FPGAs. It should not exceed 130MHzin its output frequency. D latch consists of 1 elements. There is a consumption of 4μAof quiescent energy. Terminations are 20. The 74VHCT374 family contains this object. An input voltage of 5Vpowers the D latch. Its input capacitance is 4pF farads. A device of this type belongs to the family of AHCT/VHCT. Electronic part Surface Mountis mounted in the way. Basically, it is designed with a set of 20 pins. This device has Positive Edgeas its clock edge trigger type. This device has the base part number FF/Latches. The flip flop is designed with 8bits. To achieve this superior flexibility, 8 circuits are used. As a result of its reliable performance, this T flip flop is suitable for RAIL. In order for the device to operate, it requires 5V power supplies. The D flip flop is embedded with 2ports. It is recommended that the supply voltage be kept at 5Vto maximize efficiency. There are 3 output lines on it.
MC74VHCT374AMELG Features
Tape & Reel (TR) package
74VHCT series
20 pins
8 Bits
5V power supplies
MC74VHCT374AMELG Applications
There are a lot of ON Semiconductor MC74VHCT374AMELG Flip Flops applications.
- Modulo – n – counter
- Buffer registers
- QML qualified product
- Synchronous counter
- Control circuits
- Event Detectors
- ATE
- Data Synchronizers
- Instrumentation
- Bus hold