Parameters |
Trigger Type |
Positive Edge |
Input Capacitance |
4pF |
Length |
6.5mm |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
Mounting Type |
Surface Mount |
Package / Case |
20-TSSOP (0.173, 4.40mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74VHCT |
JESD-609 Code |
e4 |
Pbfree Code |
no |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
NICKEL PALLADIUM GOLD |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
40 |
JESD-30 Code |
R-PDSO-G20 |
Function |
Standard |
Qualification Status |
COMMERCIAL |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
4.5V |
Number of Ports |
2 |
Clock Frequency |
130MHz |
Family |
AHCT/VHCT |
Current - Quiescent (Iq) |
4μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
8mA 8mA |
Output Polarity |
TRUE |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
10.4ns @ 5V, 50pF |
MC74VHCT574ADT Overview
It is packaged in the way of 20-TSSOP (0.173, 4.40mm Width). A package named Tubeincludes it. T flip flop uses Tri-State, Non-Invertedas its output configuration. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. A voltage of 4.5V~5.5Vis used as the supply voltage. It is at -40°C~85°C TAdegrees Celsius that the system is operating. D-Typeis the type of this D latch. The 74VHCTseries comprises this type of FPGA. It should not exceed 130MHzin terms of its output frequency. D latch consists of 1 elements. During its operation, it consumes 4μA quiescent energy. There are 20 terminations,The power source is powered by 5V. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. The electronic device belongs to the AHCT/VHCTfamily. As soon as 5.5Vis reached, Vsup reaches its maximum value. Keeping the supply voltage (Vsup) above 4.5V is necessary for normal operation. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.
MC74VHCT574ADT Features
Tube package
74VHCT series
MC74VHCT574ADT Applications
There are a lot of Rochester Electronics, LLC MC74VHCT574ADT Flip Flops applications.
- ESCC
- Frequency division
- Power down protection
- Latch
- Functionally equivalent to the MC10/100EL29
- Load Control
- Bus hold
- Communications
- Divide a clock signal by 2 or 4
- Control circuits