Parameters | |
---|---|
Factory Lead Time | 1 Week |
Mounting Type | Surface Mount |
Package / Case | 196-LFBGA |
Operating Temperature | 0°C~95°C TJ |
Packaging | Tray |
Published | 2017 |
Series | RT1050 |
Part Status | Active |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Peak Reflow Temperature (Cel) | 260 |
Time@Peak Reflow Temperature-Max (s) | 40 |
Oscillator Type | Internal/External |
Number of I/O | 127 |
Speed | 600MHz |
RAM Size | 512K x 8 |
Voltage - Supply (Vcc/Vdd) | 3V~3.6V |
Core Processor | ARM® Cortex®-M7 |
Peripherals | Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT |
Program Memory Type | External Program Memory |
Core Size | 32-Bit |
Connectivity | CANbus, EBI/EMI, Ethernet, I2C, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB OTG |
Data Converter | A/D 20x12b |
RoHS Status | ROHS3 Compliant |
With speeds up to 600 MHz, the Arm Cortex?-M7 core of the new processor family, the MIMXRT1052DVL6B, from NXP, offers the highest CPU performance and greatest real-time reaction.
The 512 KB on-chip RAM of the MIMXRT1052DVL6B CPU can be flexibly configured as TCM or general-purpose on-chip RAM. The i.MX RT1050 combines an advanced power management module with DCDC and LDO to simplify power sequencing and lessen the complexity of external power supplies. Additional memory interfaces offered by the MIMXRT1052DVL6B include SDRAM, RAW NAND FLASH, NOR FLASH, SD/eMMC, Quad SPI, and a variety of other interfaces for attaching peripherals including WLAN, Bluetooth?, GPS, displays, and camera sensors. Rich audio and video functions, such as an LCD display, simple 2D graphics, a camera interface, SPDIF, and an I2S audio interface, are also available on the MIMXRT1052DVL6B. Analog interfaces on the MIMXRT1052DVL6B include ADC, ACMP, and TSC.
Timers and PWMs:
— Two General Programmable Timers (GPT)
– 4-channel generic 32-bit resolution timer
– Each support standard capture and compare operation
— Four Periodical Interrupt Timer (PIT)
– Generic 16-bit resolution timer
– Periodical interrupt generation
— Four Quad Timers (QTimer)
– 4-channel generic 16-bit resolution timer for each
– Each support standard capture and compare operation
– Quadrature decoder integrated
— Four FlexPWMs
– Up to 8 individual PWM channels for each
– 16-bit resolution PWM suitable for Motor Control applications
— Four Quadrature Encoder/Decoders
Supports single Arm Cortex-M7 MPCore with:
— 32 KB L1 Instruction Cache
— 32 KB L1 Data Cache
— Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture
— Support the Armv7-M Thumb instruction set
Integrated MPU, up to 16 individual protection regions
Up to 512 KB I-TCM and D-TCM in total
Frequency of 600 MHz
Cortex M7 CoreSight? components integration for debug
The SoC-level memory system consists of the following additional components:
— Boot ROM (96 KB)
— On-chip RAM (512 KB)
– Configurable RAM size up to 512 KB shared with M7 TCM
External memory interfaces:
— 8/16-bit SDRAM, up to SDRAM-166
— 8/16-bit SLC NAND FLASH, with ECC handled in software
— SD/eMMC
— SPI NOR/NAND FLASH
— Parallel NOR FLASH with XIP support
— Single/Dual channel Quad SPI FLASH with XIP support
Industrial Human Machine Interfaces (HMI)
Motor Control
Home Appliance
Mobile phones
Laptops
Computers
Washing machines