Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Number of Pins |
20 |
Weight |
481.5mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74HC |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Type |
D-Type |
Voltage - Supply |
2V~6V |
Base Part Number |
74HC273 |
Function |
Master Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Number of Circuits |
8 |
Clock Frequency |
78MHz |
Propagation Delay |
135 ns |
Turn On Delay Time |
18 ns |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
8μA |
Current - Output High, Low |
5.2mA 5.2mA |
Max Propagation Delay @ V, Max CL |
23ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
7pF |
Clock Edge Trigger Type |
Positive Edge |
Radiation Hardening |
No |
RoHS Status |
RoHS Compliant |
Lead Free |
Lead Free |
MM74HC273SJ Overview
It is packaged in the way of 20-SOIC (0.209, 5.30mm Width). D flip flop is included in the Tubepackage. T flip flop uses Non-Invertedas the output. In the configuration of the trigger, Positive Edgeis used. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 2V~6V. In the operating environment, the temperature is -40°C~85°C TA. Logic flip flops of this type are classified as D-Type. It is a type of FPGA belonging to the 74HC series. You should not exceed 78MHzin its output frequency. There are 1 elements in it. This process consumes 8μA quiescents. The object belongs to the 74HC273 family. Its input capacitance is 7pF farads. This electronic part is mounted in the way of Surface Mount. This board is designed with 20pins on it. It has a clock edge trigger type of Positive Edge. The superior flexibility is achieved through the use of 8 circuits.
MM74HC273SJ Features
Tube package
74HC series
20 pins
MM74HC273SJ Applications
There are a lot of ON Semiconductor MM74HC273SJ Flip Flops applications.
- Divide a clock signal by 2 or 4
- Data Synchronizers
- Buffered Clock
- Instrumentation
- Load Control
- Storage Registers
- Single Down Count-Control Line
- Dynamic threshold performance
- Counters
- Latch