Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 1 week ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.209, 5.30mm Width) |
Number of Pins |
20 |
Weight |
481.5mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Published |
2005 |
Series |
74HC |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Tin (Sn) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
4.5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74HC374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Power Supplies |
2/6V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
8 |
Clock Frequency |
35MHz |
Propagation Delay |
230 ns |
Turn On Delay Time |
20 ns |
Family |
HC/UH |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
8μA |
Current - Output High, Low |
7.8mA 7.8mA |
Max I(ol) |
0.006 A |
Max Propagation Delay @ V, Max CL |
40ns @ 6V, 150pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
24000000Hz |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
MM74HC374SJ Overview
In the form of 20-SOIC (0.209, 5.30mm Width), it has been packaged. D flip flop is included in the Tubepackage. In the configuration, Tri-State, Non-Invertedis used as the output. This trigger is configured to use Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 2V~6Vvolts. The operating temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. JK flip flop is a part of the 74HCseries of FPGAs. Its output frequency should not exceed 35MHz Hz. D latch consists of 1 elements. This process consumes 8μA quiescents. The number of terminations is 20. D latch belongs to the 74HC374 family. Power is provided by a 4.5V supply. A JK flip flop with a 5pFfarad input capacitance is used here. An electronic device belonging to the family HC/UHcan be found here. A part of the electronic system is mounted in the way of Surface Mount. There are 20pins on it. A Positive Edgeclock edge trigger is used in this device. It is included in FF/Latches. This flip flop is designed with 8 Bits. 6Vis the maximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be kept above 2V. To achieve this superior flexibility, 8 circuits are used. There are 2/6V power supplies attached to it. The flip flop has 2ports embedded within it. There are no output lines on the JK flip flop.
MM74HC374SJ Features
Tube package
74HC series
20 pins
8 Bits
2/6V power supplies
MM74HC374SJ Applications
There are a lot of ON Semiconductor MM74HC374SJ Flip Flops applications.
- Frequency Divider circuits
- Digital electronics systems
- High Performance Logic for test systems
- Clock pulse
- Individual Asynchronous Resets
- Computing
- Shift Registers
- Pattern generators
- Storage Registers
- Memory