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MPC8313CVRAFFB

PowerPC e300c3 Microprocessor MPC83xx Series MPC8313 516-BBGA Exposed Pad


  • Manufacturer: NXP USA Inc.
  • Nocochips NO: 568-MPC8313CVRAFFB
  • Package: 516-BBGA Exposed Pad
  • Datasheet: PDF
  • Stock: 681
  • Description: PowerPC e300c3 Microprocessor MPC83xx Series MPC8313 516-BBGA Exposed Pad (Kg)

Details

Tags

Parameters
Published 2006
Series MPC83xx
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Base Part Number MPC8313
Speed 333MHz
Core Processor PowerPC e300c3
Voltage - I/O 1.8V 2.5V 3.3V
Ethernet 10/100/1000Mbps (2)
Number of Cores/Bus Width 1 Core 32-Bit
Graphics Acceleration No
RAM Controllers DDR, DDR2
USB USB 2.0 + PHY (1)
Additional Interfaces DUART, HSSI, I2C, PCI, SPI
RoHS Status ROHS3 Compliant
Package / Case 516-BBGA Exposed Pad
Supplier Device Package 516-TEPBGA (27x27)
Operating Temperature -40°C~105°C TA
Packaging Tray

MPC8313CVRAFFB Description

The MPC8313E incorporates the e300c3 core, which includes 16 Kbytes of L1 instruction and data caches, and on-chip memory management units (MMUs). The MPC8313E has interfaces to dual enhanced three-speed 10/100/1000 Mbps Ethernet controllers, a DDR1/DDR2 SDRAM memory controller, an enhanced local bus controller, a 32-bit PCI controller, a dedicated security engine, a USB 2.0 dual-role controller, and an on-chip high-speed PHY, a programmable interrupt controller, dual I2C controllers, a 4-channel DMA controller, and a general-purpose I/O port. This figure shows a block diagram of the MPC8313E.



MPC8313CVRAFFB Features

Embedded PowerPC? e300 processor core built on Power Architecture? technology; operates at

up to 333 MHz.

High-performance, low-power, and cost-effective host processor

DDR1/DDR2 memory controller—one 16-/32-bit interface at up to 333 MHz supporting both

DDR1 and DDR2

16-Kbyte instruction cache and 16-Kbyte data cache, a floating point unit, and two integer units

Peripheral interfaces such as 32-bit PCI interface with up to 66-MHz operation, 16-bit enhanced

local bus interface with up to 66-MHz operation, and USB 2.0 (high speed) with an on-chip PHY.

Security engine provides acceleration for control and data plane security protocols

Power management controller for low-power consumption

High degree of software compatibility with previous-generation PowerQUICC processor-based

designs for backward compatibility and easier software migration




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