MPC850DEVR50BU
| Parameters | |
|---|---|
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | MPC850 |
| JESD-30 Code | S-PBGA-B256 |
| Supply Voltage-Max (Vsup) | 3.465V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 3.135V |
| Speed | 50MHz |
| uPs/uCs/Peripheral ICs Type | MICROPROCESSOR, RISC |
| Clock Frequency | 50MHz |
| Bit Size | 32 |
| Address Bus Width | 26 |
| Boundary Scan | YES |
| Low Power Mode | YES |
| External Data Bus Width | 32 |
| Format | FIXED POINT |
| Integrated Cache | YES |
| Voltage - I/O | 3.3V |
| Ethernet | 10Mbps (1) |
| Number of Cores/Bus Width | 1 Core 32-Bit |
| Graphics Acceleration | No |
| RAM Controllers | DRAM |
| USB | USB 1.x (1) |
| Additional Interfaces | HDLC/SDLC, I2C, IrDA, PCMCIA-ATA, TDM, UART/USART |
| Co-Processors/DSP | Communications; CPM |
| Height Seated (Max) | 2.35mm |
| Length | 23mm |
| RoHS Status | ROHS3 Compliant |
| Package / Case | 256-BBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~95°C TA |
| Packaging | Tray |
| Published | 1997 |
| Series | MPC8xx |
| JESD-609 Code | e1 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 256 |
| ECCN Code | 3A991.A.2 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| HTS Code | 8542.31.00.01 |
| Subcategory | Microprocessors |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1.27mm |
MPC850DEVR50BU Description
The MPC850DEVR50BU PowerQUICC? processor offers a versatile, integrated, low-cost solution for a variety of controller, networking, and communications applications. The MPC850DEVR50BU includes extensive communications and system integration support, simplifies development and accelerates time-to-market, offloads core tasks for increased performance and efficiency, and is backed by strong third-party tool support through Our Design Alliance Program.
MPC850DEVR50BU Features
2-Kbyte Instruction Cache
1-Kbyte Data Cache
Instruction and Data MMUs
Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8,16, and 32 Bits)
26 External Address Lines
Complete Static Design (0-66 MHz Operation)
Memory Controller (Eight Banks)
General-Purpose Timers
System Integration Unit (SIU)
MPC850DEVR50BU Applications
Automotive
Hybrid, electric & powertrain systems
Industrial
Test & Measurement
Enterprise systems
Enterprise projectors
