MPC860TVR50D4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 357-BBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~95°C TA |
| Packaging | Tray |
| Published | 2004 |
| Series | MPC8xx |
| JESD-609 Code | e1 |
| Part Status | Not For New Designs |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 357 |
| ECCN Code | 3A991.A.2 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| HTS Code | 8542.31.00.01 |
| Subcategory | Microprocessors |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | MPC860 |
| JESD-30 Code | S-PBGA-B357 |
| Supply Voltage-Max (Vsup) | 3.465V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 3.135V |
| Speed | 50MHz |
| uPs/uCs/Peripheral ICs Type | MICROPROCESSOR, RISC |
| Clock Frequency | 50MHz |
| Bit Size | 32 |
| Address Bus Width | 32 |
| Boundary Scan | YES |
| Low Power Mode | YES |
| External Data Bus Width | 32 |
| Format | FIXED POINT |
| Integrated Cache | YES |
| Voltage - I/O | 3.3V |
| Ethernet | 10Mbps (4), 10/100Mbps (1) |
| Number of Cores/Bus Width | 1 Core 32-Bit |
| Graphics Acceleration | No |
| RAM Controllers | DRAM |
| Additional Interfaces | HDLC/SDLC, I2C, IrDA, PCMCIA, SPI, TDM, UART/USART |
| Co-Processors/DSP | Communications; CPM |
| Height Seated (Max) | 2.52mm |
| Length | 25mm |
| RoHS Status | ROHS3 Compliant |
MPC860TVR50D4 Description
The MPC860TVR50D4 PowerQUICC? offers an integrated processor and peripheral solution that can be used in a variety of communications and networking controller applications. The MPC860TVR50D4 delivers higher performance in all areas of device operation including flexibility, extensions in capability, and integration provides lower power consumption than traditional architectures, and is backed by strong third-party tool support through Our Design Alliance Program.
MPC860TVR50D4 Features
4 MByte, Unbuffered, Synchronous Dram On-Board.
Memory Disable Option for each local memory map slaves
Programmable Hard-Reset Configuration via BCSR
Module Enable Indications.
Communications Processor Module (CPM)
Four Baud Rate Generators
MPC860TVR50D4 Applications
Automotive
Advanced driver assistance systems (ADAS)
Industrial
Power delivery
Enterprise systems
Enterprise projectors
