Parameters | |
---|---|
Factory Lead Time | 1 Week |
Package / Case | 364-LFBGA |
Surface Mount | YES |
Operating Temperature | -40°C~85°C TA |
Packaging | Tray |
Published | 2002 |
Series | Vybrid, VF6xx |
JESD-609 Code | e2 |
Part Status | Active |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Number of Terminations | 364 |
ECCN Code | 5A002.A.1 |
Terminal Finish | Tin/Silver (Sn/Ag) |
HTS Code | 8542.31.00.01 |
Subcategory | Microcontrollers |
Technology | CMOS |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Peak Reflow Temperature (Cel) | 260 |
Supply Voltage | 1.23V |
Terminal Pitch | 0.8mm |
Time@Peak Reflow Temperature-Max (s) | 40 |
Base Part Number | MVF61NS151 |
JESD-30 Code | S-PBGA-B364 |
Qualification Status | Not Qualified |
Supply Voltage-Max (Vsup) | 1.26V |
Power Supplies | 3.3V |
Supply Voltage-Min (Vsup) | 1.16V |
Number of I/O | 131 |
Speed | 500MHz, 167MHz |
uPs/uCs/Peripheral ICs Type | MICROCONTROLLER, RISC |
Core Processor | ARM® Cortex®-A5 + Cortex®-M4 |
Supply Current-Max | 850mA |
Bit Size | 16 |
Has ADC | YES |
DMA Channels | YES |
PWM Channels | NO |
DAC Channels | YES |
Address Bus Width | 16 |
External Data Bus Width | 16 |
Voltage - I/O | 3.3V |
Ethernet | 10/100Mbps (2) |
Number of Cores/Bus Width | 2 Core 32-Bit |
Graphics Acceleration | Yes |
RAM Controllers | LPDDR2, DDR3, DRAM |
USB | USB 2.0 OTG + PHY (1) |
Additional Interfaces | CAN, I2C, IrDA, LIN, SCI, SDHC, SPI, UART/USART |
Co-Processors/DSP | Multimedia; NEON™ MPE |
ROM Programmability | FLASH |
Security Features | ARM TZ, CAAM, HAB, RTIC, Secure JTAG, SNVS, Tamper, TZ ASC, TZ WDOG |
Display & Interface Controllers | DCU, GPU, LCD, VideoADC, VIU |
Length | 17mm |
RoHS Status | ROHS3 Compliant |
The MVF61NS151CMK50 is a heterogeneous dual-core solution that combines the Arm? Cortex?-A5 and Cortex-M4 cores. The MVF61NS151CMK50 includes Dual USB 2.0 OTG controllers with integrated PHY Dual 10/100 Ethernet controllers with L2 switch, multiple serial interfaces, such as UARTs with support for ISO 7816 SIM/smart cards, SPI and I2C and dual CAN module, and up to 1.5 MB of on-chip SRAM and a rich suite of communication, connectivity and human-machine interfaces (HMI).
Dual heterogeneous core: Cortex-A5 and Cortex-M4
Optional 512 KB L2 Cache
1.5 MB on-chip SRAM (1.0 MB when L2 Cache is selected)
Dual USB 2.0 OTG with integrated PHY
Dual Ethernet 10/100 MAC with L2 switch
Both digital and analog video camera interfaces
Heating Ventilation, and Air Conditioning (HVAC)
3-Phase AC Induction Motor
Air Conditioning (AC)
Anesthesia Unit Monitor
Hearables
Input Device (Mouse, Pen, Keyboard)