Parameters |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
8 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
0.9V~3.6V |
Terminal Position |
QUAD |
Terminal Pitch |
0.5mm |
Base Part Number |
7SV74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
3.6V |
Supply Voltage-Min (Vsup) |
0.9V |
Number of Channels |
1 |
Load Capacitance |
30pF |
Number of Bits |
1 |
Clock Frequency |
200MHz |
Propagation Delay |
4.5 ns |
Turn On Delay Time |
13 ns |
Family |
AUP/ULP/V |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
900μA |
Current - Output High, Low |
24mA 24mA |
Max I(ol) |
0.002 A |
Max Propagation Delay @ V, Max CL |
2.8ns @ 3.3V, 30pF |
Trigger Type |
Positive Edge |
Input Capacitance |
2pF |
fmax-Min |
250 MHz |
Clock Edge Trigger Type |
Positive Edge |
Height |
550μm |
Length |
1.6mm |
Width |
1.6mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
8-UFQFN |
Number of Pins |
8 |
Weight |
25mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2016 |
Series |
7SV |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
NC7SV74L8X Overview
The flip flop is packaged in 8-UFQFN. D flip flop is included in the Tape & Reel (TR)package. Differentialis the output configured for it. There is a trigger configured with Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. With a supply voltage of 0.9V~3.6V volts, it operates. A temperature of -40°C~85°C TAis considered to be the operating temperature. A flip flop of this type is classified as a D-Type. In FPGA terms, D flip flop is a type of 7SVseries FPGA. There should be no greater frequency than 200MHzon its output. It consumes 900μA of quiescent It has been determined that there have been 8 terminations. You can search similar parts based on 7SV74. The input capacitance of this T flip flop is 2pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. An electronic device belonging to the family AUP/ULP/Vcan be found here. It is mounted by the way of Surface Mount. A total of 8pins are provided on this board. There is a clock edge trigger type of Positive Edgeon this device. The RS flip flops belongs to FF/Latches base part number. The design is based on 1bits. As soon as 3.6Vis reached, Vsup reaches its maximum value. Normal operation requires a supply voltage (Vsup) above 0.9V. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. Currently, there are 1 channels available.
NC7SV74L8X Features
Tape & Reel (TR) package
7SV series
8 pins
1 Bits
NC7SV74L8X Applications
There are a lot of ON Semiconductor NC7SV74L8X Flip Flops applications.
- Storage registers
- Data transfer
- Frequency Divider circuits
- Registers
- Latch
- Data Synchronizers
- Asynchronous counter
- Set-reset capability
- Count Modes
- Bus hold