NC7SZ175P6X
| Parameters | |
|---|---|
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-TSSOP, SC-88, SOT-363 |
| Number of Pins | 6 |
| Weight | 28mg |
| Manufacturer Package Identifier | NC7SZ175P6X |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Published | 2004 |
| Series | 7SZ |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 1.8V |
| Base Part Number | 7SZ175 |
| Function | Reset |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 3.3V |
| Number of Channels | 1 |
| Load Capacitance | 50pF |
| Output Current | 32mA |
| Number of Bits | 1 |
| Clock Frequency | 175MHz |
| Propagation Delay | 16.5 ns |
| Quiescent Current | 1μA |
| Turn On Delay Time | 9.8 ns |
| Family | LVC/LCX/Z |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 32mA 32mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 4ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 3pF |
| Number of Output Lines | 1 |
NC7SZ175P6X Overview
The item is packaged in 6-TSSOP, SC-88, SOT-363cases. It is included in the package Tape & Reel (TR). Currently, the output is configured to use Non-Inverted. It is configured with a trigger that uses Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. It is operating at -40°C~85°C TA. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 7SZseries FPGA. Its output frequency should not exceed 175MHz Hz. Currently, there are 6 terminations. The 7SZ175family includes it. It is powered by a voltage of 1.8V . JK flip flop input capacitance is 3pF farads. The electronic device belongs to the LVC/LCX/Zfamily. There is an electronic part mounted in the way of Surface Mount. The electronic flip flop is designed with pins 6. The clock edge trigger type for this device is Positive Edge. The part you are looking for is included in FF/Latches. 1bits are used in its design. In this case, the maximum supply voltage (Vsup) reaches 5.5V. In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. The D latch operates on 3.3V volts. With an output current of 32mA, this device offers maximum design flexibility. In order to operate, the chip has 1 output lines. Quiescent current is consumed by the D latch in the amount of 1μA. 1is the number of channels.
NC7SZ175P6X Features
Tape & Reel (TR) package
7SZ series
6 pins
1 Bits
3.3V power supplies
NC7SZ175P6X Applications
There are a lot of ON Semiconductor NC7SZ175P6X Flip Flops applications.
- Common Clocks
- Reduced system switching noise
- Divide a clock signal by 2 or 4
- Latch-up performance
- Instrumentation
- Power down protection
- Bounce elimination switch
- Data storage
- Patented noise
- EMI reduction circuitry
