Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
6-UFDFN |
Number of Pins |
6 |
Weight |
30g |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2008 |
Series |
7SZ |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
6 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Gold/Nickel (Au/Ni) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
1.65V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
NO LEAD |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
1.8V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
7SZ374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Number of Circuits |
1 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Number of Bits |
1 |
Clock Frequency |
175MHz |
Propagation Delay |
4 ns |
Quiescent Current |
1μA |
Turn On Delay Time |
9.7 ns |
Family |
LVC/LCX/Z |
Logic Function |
D-Type, Flip-Flop |
Current - Output High, Low |
32mA 32mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
4ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
0.55mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
NC7SZ374L6X Overview
6-UFDFNis the way it is packaged. There is an embedded version in the package Tape & Reel (TR). The output it is configured with uses Tri-State, Non-Inverted. It is configured with a trigger that uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A supply voltage of 1.65V~5.5V is required for operation. A temperature of -40°C~85°C TAis used in the operation. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 7SZseries of FPGAs. A frequency of 175MHzshould not be exceeded by its output. Currently, there are 6 terminations. JK flip flop belongs to 7SZ374 family. A voltage of 1.8V is used to power it. A JK flip flop with a 3pFfarad input capacitance is used here. Electronic devices of this type belong to the LVC/LCX/Zfamily. A part of the electronic system is mounted in the way of Surface Mount. It is designed with 6 pins. This device's clock edge trigger type is Positive Edge. The RS flip flops belongs to FF/Latches base part number. An electronic part designed with 1bits is used in this application. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. The superior flexibility of this circuit is achieved by using 1 circuits. A reliable performance of this D flip flop makes it well suited for use in TAPE AND REEL. This flip flop has a total of 2ports. In order for the chip to function, it has 3output lines. There is 1μA quiescent current consumption by it.
NC7SZ374L6X Features
Tape & Reel (TR) package
7SZ series
6 pins
1 Bits
NC7SZ374L6X Applications
There are a lot of ON Semiconductor NC7SZ374L6X Flip Flops applications.
- Automotive
- ATE
- ESD performance
- Guaranteed simultaneous switching noise level
- Frequency division
- Single Down Count-Control Line
- Set-reset capability
- Clock pulse
- Latch
- Bus hold