NLV14013BDG
| Parameters | |
|---|---|
| Published | 2006 |
| Series | 4000B |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 14 |
| Type | D-Type |
| Terminal Finish | Tin (Sn) |
| Subcategory | FF/Latches |
| Packing Method | RAIL |
| Technology | CMOS |
| Voltage - Supply | 3V~18V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Supply Voltage | 5V |
| Base Part Number | 4013 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Min (Vsup) | 3V |
| Load Capacitance | 50pF |
| Clock Frequency | 14MHz |
| Turn On Delay Time | 50 ns |
| Logic Function | AND |
| Current - Quiescent (Iq) | 4μA |
| Halogen Free | Halogen Free |
| Current - Output High, Low | 8.8mA 8.8mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 100ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Clock Edge Trigger Type | Positive Edge |
| Length | 8.65mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 14-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 14 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
NLV14013BDG Overview
The flip flop is packaged in a case of 14-SOIC (0.154, 3.90mm Width). Package Tubeembeds it. T flip flop is configured with an output of Differential. Positive Edgeis the trigger it is configured with. There is an electric part mounted in the way of Surface Mount. A 3V~18Vsupply voltage is required for it to operate. It is at -55°C~125°C TAdegrees Celsius that the system is operating. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 4000Bseries FPGA. You should not exceed 14MHzin the output frequency of the device. In total, it contains 2 elements. It consumes 4μA of quiescent The number of terminations is 14. The object belongs to the 4013 family. The power source is powered by 5V. The input capacitance of this JK flip flopis 5pF farads. Electronic part Surface Mountis mounted in the way. 14pins are included in its design. A Positive Edgeclock edge trigger is used in this device. The part you are looking for is included in FF/Latches. The supply voltage (Vsup) should be kept above 3V for normal operation. In view of its reliability, this D flip flop is a good fit for RAIL.
NLV14013BDG Features
Tube package
4000B series
14 pins
NLV14013BDG Applications
There are a lot of ON Semiconductor NLV14013BDG Flip Flops applications.
- Guaranteed simultaneous switching noise level
- Memory
- Asynchronous counter
- Supports Live Insertion
- Clock pulse
- Count Modes
- Test & Measurement
- Data transfer
- Storage registers
- Matched Rise and Fall
