NLV14027BDG
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 16 |
| Operating Temperature | -55°C~125°C TA |
| Packaging | Tube |
| Published | 2005 |
| Series | 4000B |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 16 |
| Type | JK Type |
| Terminal Finish | Tin (Sn) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 3V~18V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 4027 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 2 |
| Supply Voltage-Min (Vsup) | 3V |
| Load Capacitance | 50pF |
| Clock Frequency | 13MHz |
| Turn On Delay Time | 50 ns |
| Logic Function | AND |
| Current - Quiescent (Iq) | 4μA |
| Halogen Free | Halogen Free |
| Current - Output High, Low | 8.8mA 8.8mA |
| Output Polarity | COMPLEMENTARY |
| Number of Bits per Element | 1 |
| Max Propagation Delay @ V, Max CL | 100ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 5pF |
| Clock Edge Trigger Type | Positive Edge |
| Length | 9.9mm |
| Width | 3.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
NLV14027BDG Overview
The flip flop is packaged in a case of 16-SOIC (0.154, 3.90mm Width). D flip flop is embedded in the Tube package. As configured, the output uses Differential. There is a trigger configured with Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 3V~18Vis required for its operation. The operating temperature is -55°C~125°C TA. Logic flip flops of this type are classified as JK Type. JK flip flop is a part of the 4000Bseries of FPGAs. There should be no greater frequency than 13MHzon its output. A total of 2 elements are present. Despite external influences, it consumes 4μAof quiescent current. There are 16 terminations,You can search similar parts based on 4027. An input voltage of 5Vpowers the D latch. JK flip flop input capacitance is 5pF farads. A part of the electronic system is mounted in the way of Surface Mount. A total of 16pins are provided on this board. This device's clock edge trigger type is Positive Edge. It is part of the FF/Latchesbase part number family. For normal operation, the supply voltage (Vsup) should be kept above 3V.
NLV14027BDG Features
Tube package
4000B series
16 pins
NLV14027BDG Applications
There are a lot of ON Semiconductor NLV14027BDG Flip Flops applications.
- Communications
- Bounce elimination switch
- Storage registers
- Bus hold
- 2 – Bit synchronous counter
- High Performance Logic for test systems
- Frequency Dividers
- Circuit Design
- Synchronous counter
- Set-reset capability
