Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 2 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
16-SOIC (0.154, 3.90mm Width) |
Number of Pins |
16 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2005 |
Series |
4000B |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
16 |
Type |
JK Type |
Terminal Finish |
Tin (Sn) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
3V~18V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
4027 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Number of Elements |
2 |
Supply Voltage-Min (Vsup) |
3V |
Load Capacitance |
50pF |
Clock Frequency |
13MHz |
Turn On Delay Time |
50 ns |
Logic Function |
AND |
Current - Quiescent (Iq) |
4μA |
Halogen Free |
Halogen Free |
Current - Output High, Low |
8.8mA 8.8mA |
Output Polarity |
COMPLEMENTARY |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
100ns @ 15V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
5pF |
Clock Edge Trigger Type |
Positive Edge |
Length |
9.9mm |
Width |
3.9mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
NLV14027BDR2G Overview
The flip flop is packaged in 16-SOIC (0.154, 3.90mm Width). The Tape & Reel (TR)package contains it. Currently, the output is configured to use Differential. This trigger uses the value Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. Powered by a 3V~18Vvolt supply, it operates as follows. A temperature of -55°C~125°C TAis considered to be the operating temperature. A flip flop of this type is classified as a JK Type. It is a type of FPGA belonging to the 4000B series. You should not exceed 13MHzin its output frequency. In total, it contains 2 elements. It consumes 4μA of quiescent current without being affected by external factors. There have been 16 terminations. D latch belongs to the 4027 family. A voltage of 5V provides power to the D latch. JK flip flop input capacitance is 5pF farads. It is mounted in the way of Surface Mount. The 16pins are designed into the board. There is a clock edge trigger type of Positive Edgeon this device. The part you are looking for is included in FF/Latches. For normal operation, the supply voltage (Vsup) should be kept above 3V.
NLV14027BDR2G Features
Tape & Reel (TR) package
4000B series
16 pins
NLV14027BDR2G Applications
There are a lot of ON Semiconductor NLV14027BDR2G Flip Flops applications.
- EMI reduction circuitry
- ESD performance
- Modulo – n – counter
- Power down protection
- Frequency Dividers
- Instrumentation
- Patented noise
- QML qualified product
- Guaranteed simultaneous switching noise level
- ATE