Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SOIC (0.295, 7.50mm Width) |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2005 |
Series |
Automotive, AEC-Q100, 74HC |
JESD-609 Code |
e3 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
20 |
Type |
D-Type |
Terminal Finish |
Tin (Sn) |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Supply Voltage |
3V |
JESD-30 Code |
R-PDSO-G20 |
Function |
Reset |
Output Type |
Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Clock Frequency |
35MHz |
Propagation Delay |
25 ns |
Quiescent Current |
4μA |
Family |
HC/UH |
Current - Output High, Low |
7.8mA 7.8mA |
Output Polarity |
TRUE |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
25ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2.65mm |
Width |
7.5mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
NLV74HC273ADWR2G Overview
It is embeded in 20-SOIC (0.295, 7.50mm Width) case. There is an embedded version in the package Tape & Reel (TR). Currently, the output is configured to use Non-Inverted. The trigger configured with it uses Positive Edge. The electronic part is mounted in the way of Surface Mount. The supply voltage is set to 2V~6V. Temperature is set to -55°C~125°C TA. D-Typeis the type of this D latch. It is a type of FPGA belonging to the Automotive, AEC-Q100, 74HC series. A frequency of 35MHzshould not be exceeded by its output. A total of 1elements are contained within it. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The power supply voltage is 3V. A 10pFfarad input capacitance is provided by this T flip flop. Devices in the HC/UHfamily are electronic devices. There is an electronic part mounted in the way of Surface Mount. This device exhibits a clock edge trigger type of Positive Edge. Vsup reaches 6V, the maximal supply voltage. For normal operation, the supply voltage (Vsup) should be kept above 2V. 4μAquiescent current consumed.
NLV74HC273ADWR2G Features
Tape & Reel (TR) package
Automotive, AEC-Q100, 74HC series
NLV74HC273ADWR2G Applications
There are a lot of ON Semiconductor NLV74HC273ADWR2G Flip Flops applications.
- Divide a clock signal by 2 or 4
- Digital electronics systems
- Shift Registers
- Clock pulse
- Single Down Count-Control Line
- 2 – Bit synchronous counter
- ATE
- Frequency division
- Counters
- Instrumentation