Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 20 hours ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-TSSOP (0.173, 4.40mm Width) |
Number of Pins |
14 |
Operating Temperature |
-55°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Published |
2005 |
Series |
Automotive, AEC-Q100, 74HC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Number of Elements |
2 |
Supply Voltage-Max (Vsup) |
6V |
Supply Voltage-Min (Vsup) |
2V |
Load Capacitance |
50pF |
Clock Frequency |
35MHz |
Propagation Delay |
17 ns |
Quiescent Current |
2μA |
Family |
HC/UH |
Logic Function |
AND, D-Type |
Current - Output High, Low |
5.2mA 5.2mA |
Output Polarity |
COMPLEMENTARY |
Max I(ol) |
0.004 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
17ns @ 6V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
10pF |
Clock Edge Trigger Type |
Positive Edge |
Length |
5mm |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
NLV74HC74ADTR2G Overview
14-TSSOP (0.173, 4.40mm Width)is the packaging method. There is an embedded version in the package Tape & Reel (TR). T flip flop is configured with an output of Differential. In the configuration of the trigger, Positive Edgeis used. There is an electronic component mounted in the way of Surface Mount. The supply voltage is set to 2V~6V. In the operating environment, the temperature is -55°C~125°C TA. D-Typeis the type of this D latch. In this case, it is a type of FPGA belonging to the Automotive, AEC-Q100, 74HC series. There should be no greater frequency than 35MHzon its output. D latch consists of 2 elements. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is powered from a supply voltage of 5V. This T flip flop has a capacitance of 10pF farads at the input. In terms of electronic devices, this device belongs to the HC/UHfamily of devices. It is mounted by the way of Surface Mount. There are 14pins on it. In this device, the clock edge trigger type is Positive Edge. The RS flip flops belongs to FF/Latches base part number. As soon as 6Vis reached, Vsup reaches its maximum value. For normal operation, the supply voltage (Vsup) should be above 2V. Considering the reliability of this T flip flop, it is well suited for TAPE AND REEL. In terms of quiescent current, it consumes 2μA .
NLV74HC74ADTR2G Features
Tape & Reel (TR) package
Automotive, AEC-Q100, 74HC series
14 pins
NLV74HC74ADTR2G Applications
There are a lot of ON Semiconductor NLV74HC74ADTR2G Flip Flops applications.
- Differential Individual
- Data Synchronizers
- Functionally equivalent to the MC10/100EL29
- Registers
- Frequency Dividers
- Individual Asynchronous Resets
- Supports Live Insertion
- Storage Registers
- Shift registers
- Guaranteed simultaneous switching noise level