Parameters | |
---|---|
Format | FLOATING POINT |
Integrated Cache | YES |
Voltage - I/O | 1.8V 3.0V |
Number of UART Channels | 3 |
Number of Cores/Bus Width | 1 Core 32-Bit |
Graphics Acceleration | Yes |
RAM Controllers | LPDDR |
USB | USB 1.x (3), USB 2.0 (1) |
Additional Interfaces | HDQ/1-Wire, I2C, McBSP, McSPI, MMC/SD/SDIO, UART |
Co-Processors/DSP | Signal Processing; C64x+, Multimedia; NEON™ SIMD |
Display & Interface Controllers | LCD |
Height Seated (Max) | 0.9mm |
Radiation Hardening | No |
REACH SVHC | Unknown |
RoHS Status | ROHS3 Compliant |
Lead Free | Contains Lead |
Mount | Surface Mount |
Package / Case | 515-VFBGA, FCBGA |
Number of Pins | 515 |
Operating Temperature | 0°C~90°C TJ |
Packaging | Tray |
Series | OMAP-35xx |
Pbfree Code | no |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Number of Terminations | 515 |
Subcategory | Graphics Processors |
Technology | CMOS |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Supply Voltage | 1.8V |
Terminal Pitch | 0.4mm |
Frequency | 720MHz |
Base Part Number | OMAP3530 |
Pin Count | 515 |
Voltage | 1.35V |
Interface | I2C, MMC, SDIO, UART, USB |
Max Supply Voltage | 1.35V |
Min Supply Voltage | 985mV |
Memory Size | 208kB |
RAM Size | 64kB |
Memory Type | L2 Cache, ROM, SRAM |
uPs/uCs/Peripheral ICs Type | MICROPROCESSOR, RISC |
Number of Bits | 32 |
Core Processor | ARM® Cortex®-A8 |
Bit Size | 32 |
Data Bus Width | 32b |
Number of Timers/Counters | 12 |
Address Bus Width | 26 |
Core Architecture | ARM |
Boundary Scan | YES |
Low Power Mode | YES |
OMAP3530DCBB72 Description
The OMAP3530DCBB72 applications processor is based on the enhanced OMAP 3 architecture. The OMAP 3 architecture is designed to provide best-in-class video, image, and graphics processing sufficient to support the following: Streaming video, Video conferencing, and High-resolution still image. The OMAP3530DCBB72 supports high-level operating systems (HLOSs), such as Linux?, Windows? CE, and Android?. This OMAP3530DCBB72 includes state-of-the-art power-management techniques required for high-performance mobile products.
OMAP? 3 Architecture
High-Performance Image, Video, Audio(IVA2.2?) Accelerator Subsystem
PowerVR? SGX? Graphics Accelerator
Fully Software-Compatible with C64x and ARM9?
Load-Store Architecture with Nonaligned Support
64 32-Bit General-Purpose Registers
Instruction Packing Reduces Code Size
All Instructions Conditional
Additional C64x+ Enhancements
Portable Navigation Devices
Portable Media Player
Digital Video Camera
Portable Data Collection
Point-of-Sale Devices
Gaming
Web Tablet
Smart White Goods
Smart Home Controllers