Parameters | |
---|---|
Contact Plating | Copper, Silver, Tin |
Mount | Surface Mount |
Package / Case | 361-LFBGA |
Number of Pins | 361 |
Operating Temperature | 0°C~90°C TJ |
Packaging | Tray |
Series | OMAP-L1x |
JESD-609 Code | e1 |
Pbfree Code | yes |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Number of Terminations | 361 |
Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
Subcategory | Other uPs/uCs/Peripheral ICs |
Technology | CMOS |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Peak Reflow Temperature (Cel) | 260 |
Supply Voltage | 1V |
Terminal Pitch | 0.8mm |
Frequency | 375MHz |
Base Part Number | OMAPL138 |
Pin Count | 361 |
Operating Supply Voltage | 1.3V |
Voltage | 1.35V |
Interface | I2C, SPI, UART |
Max Supply Voltage | 1.35V |
RAM Size | 64kB |
uPs/uCs/Peripheral ICs Type | DIGITAL SIGNAL PROCESSOR, OTHER |
Number of Bits | 32 |
Core Processor | ARM926EJ-S |
Data Bus Width | 16b |
Core Architecture | ARM |
Boundary Scan | YES |
Low Power Mode | YES |
Format | FLOATING POINT |
Voltage - I/O | 1.8V 3.3V |
Number of UART Channels | 3 |
Ethernet | 10/100Mbps (1) |
Number of Cores/Bus Width | 1 Core 32-Bit |
Graphics Acceleration | No |
RAM Controllers | SDRAM |
USB | USB 1.1 + PHY (1), USB 2.0 + PHY (1) |
Additional Interfaces | HPI, I2C, McASP, McBSP, MMC/SD, SPI, UART |
Co-Processors/DSP | Signal Processing; C674x, System Control; CP15 |
Barrel Shifter | NO |
Internal Bus Architecture | MULTIPLE |
Security Features | Boot Security, Cryptography |
Display & Interface Controllers | LCD |
SATA | SATA 3Gbps (1) |
Height Seated (Max) | 1.4mm |
Length | 16mm |
REACH SVHC | No SVHC |
RoHS Status | ROHS3 Compliant |
Lead Free | Lead Free |
The OMAPL138BZWT3 processor is a low-power applications processor based on an ARM926EJ-S and a C674x DSP core. This OMAPL138BZWT3 processor provides significantly lower power than other members of the TMS320C6000? platform of DSPs. The OMAPL138BZWT3 enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution.
Dual-Core SoC
ARM926EJ-S Core
ARM9? Memory Architecture
C674x Instruction Set Features
C674x Two-Level Cache Memory Architecture
128KB of RAM Shared Memory
1.8-V or 3.3-V LVCMOS I/Os (Except for USB and DDR2 Interfaces)
LCD Controller
Two Serial Peripheral Interfaces (SPIs) Each With Multiple Chip Selects
Professional or Private Mobile Radio (PMR)
Remote Radio Unit (RRU)
Remote Radio Head (RRH)
Industrial Automation
Currency Inspection
Biometric Identification
Machine Vision (Low-End)
Smart Grid Substation Protection
Industrial Portable Navigation Devices