P1022NXN2LFB
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 689-BBGA Exposed Pad |
| Surface Mount | YES |
| Operating Temperature | -40°C~125°C TA |
| Packaging | Tray |
| Published | 2002 |
| Series | QorIQ P1 |
| JESD-609 Code | e2 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 689 |
| ECCN Code | 3A991.A.2 |
| Terminal Finish | TIN COPPER/TIN SILVER |
| HTS Code | 8542.31.00.01 |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1V |
| Terminal Pitch | 1mm |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | P1022 |
| JESD-30 Code | S-PBGA-B689 |
| Supply Voltage-Max (Vsup) | 1.05V |
| Supply Voltage-Min (Vsup) | 0.95V |
| Speed | 1.067GHz |
| uPs/uCs/Peripheral ICs Type | MICROPROCESSOR, RISC |
| Core Processor | PowerPC e500v2 |
| Clock Frequency | 133MHz |
| Bit Size | 32 |
| Boundary Scan | YES |
| Low Power Mode | YES |
| Format | FIXED POINT |
| Integrated Cache | YES |
| Ethernet | 10/100/1000Mbps (2) |
| Number of Cores/Bus Width | 2 Core 32-Bit |
| Graphics Acceleration | No |
| RAM Controllers | DDR2, DDR3 |
| USB | USB 2.0 + PHY (2) |
| Additional Interfaces | DUART, I2C, I2S, MMC/SD, SPI |
| Display & Interface Controllers | LCD |
| SATA | SATA 3Gbps (2) |
| Height Seated (Max) | 2.46mm |
| Length | 31mm |
| RoHS Status | ROHS3 Compliant |
P1022NXN2LFB Description
The P1022NXN2LFB processor is designed to deliver complex application processing performance with exceptional feature integration and high-speed connectivity for IP networking and advanced media processing applications. This P1022NXN2LFB combines dual e500 processor cores built on Power Architecture? technology with enhanced system peripherals and interconnects technology to balance processor performance with I/O system throughput. Ideally suited for the printing and imaging market, the P1022NXN2LFB processor includes advanced deep sleep power and energy management features that enable developers to design next-generation energy efficiency and environmental and governmental energy regulatory power requirements.
P1022NXN2LFB Features
Dual (P1022) or single (P1013) high-performance Power Architecture e500 cores
Core frequencies from 667 MHz to 1200 MHz
32 KB L1 I/D caches
256 KB L2 cache with ECC.
Two 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)
32/64-bit DDR2/DDR3 SDRAM memory controller with ECC support
P1022NXN2LFB Applications
Automotive Radar Systems
Avionics
Electricity Meter
Energy Gateway
Personal/Consumer NAS
