P2041NXE7PNC
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Package / Case | 780-BFBGA, FCBGA |
| Surface Mount | YES |
| Operating Temperature | -40°C~105°C TA |
| Packaging | Tray |
| Published | 2002 |
| Series | QorIQ P2 |
| JESD-609 Code | e1 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 780 |
| ECCN Code | 5A002.A.1 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| HTS Code | 8542.31.00.01 |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 245 |
| Terminal Pitch | 0.8mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | P2041 |
| JESD-30 Code | S-PBGA-B780 |
| Speed | 1.5GHz |
| uPs/uCs/Peripheral ICs Type | MICROPROCESSOR, RISC |
| Core Processor | PowerPC e500mc |
| Clock Frequency | 133MHz |
| Bit Size | 64 |
| Address Bus Width | 32 |
| Boundary Scan | YES |
| Low Power Mode | YES |
| External Data Bus Width | 64 |
| Format | FIXED POINT |
| Integrated Cache | YES |
| Voltage - I/O | 1.0V 1.35V 1.5V 1.8V 2.5V 3.3V |
| Ethernet | 10/100/1000Mbps (5), 10Gbps (1) |
| Number of Cores/Bus Width | 4 Core 32-Bit |
| Graphics Acceleration | No |
| RAM Controllers | DDR3, DDR3L |
| USB | USB 2.0 + PHY (2) |
| Additional Interfaces | DUART, I2C, MMC/SD, RapidIO, SPI |
| Co-Processors/DSP | Security; SEC 4.2 |
| Security Features | Boot Security, Cryptography, Random Number Generator, Secure Fusebox |
| SATA | SATA 3Gbps (2) |
| Height Seated (Max) | 2.51mm |
| Length | 23mm |
| RoHS Status | ROHS3 Compliant |
P2041NXE7PNC Description
The P2041NXE7PNC combines four Power Architecture? processor cores with high-performance datapath acceleration logic and network and peripheral bus interfaces required for networking, telecom/datacom, wireless infrastructure, and military/aerospace applications. The P2041NXE7PNC is a very flexible device that can be configured to meet many system application needs. For example, it can be used for combined control, datapath, and application layer processing in routers, switches, base station controllers, and general-purpose embedded computing systems.
P2041NXE7PNC Features
Four e500mc cores built on Power Architecture technology each with a private 128-Kbyte
backside cache
1-Mbyte shared CoreNet platform cache (CPC)
Hierarchical interconnect fabric
One 64-bit DDR3/3L SDRAM memory controller with ECC and chip-select interleaving support
Ethernet interfaces
High-speed peripheral interfaces
Additional peripheral interfaces
P2041NXE7PNC Applications
Broadband Modem and Residential Gateway
Enterprise Access Point
Ethernet Switch
Avionics
Electricity Grid and Distribution
Electricity Meter
