SCE028LD3VC1B
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Mounting Type | Panel Mount |
| Operating Temperature | -40°C~85°C |
| Series | SCE |
| Size / Dimension | 1.687Dia 42.85mm |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Termination | Terminal Block, Wire Leads |
| Technology | Piezo |
| Frequency | 2.9kHz |
| Approval Agency | cUL, UL |
| Operating Mode | Single Tone |
| Input Type | DC |
| Current - Supply | 40mA |
| Voltage Range | 16V~28V |
| Port Location | Top |
| Sound Pressure Level (SPL) | 85dB @ 16V, 61cm |
| Driver Circuitry | Indicator, Internally Driven |
| Height Seated (Max) | 1.511 38.39mm |
| RoHS Status | ROHS3 Compliant |
STM32F777VIT6 Description
The STM32F777VIT6 is based on the high-performance Arm? Cortex?-M7 32-bit RISC core operating at up to 216 MHz frequency. The Cortex?-M7 core features a floating-point unit (FPU) that supports Arm? double-precision and single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances the application security.
STM32F777VIT6 Features
? Core: Arm? 32-bit Cortex?-M7 CPU with
DPFPU, ART Accelerator?, and L1-cache:
16 Kbytes I/D cache, allowing 0-wait state
execution from embedded Flash and external
memories, up to 216 MHz, MPU,
462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1),
and DSP instructions.
? Memories
– Up to 2 Mbytes of Flash memory organized into two banks allowing read-while-write
– SRAM: 512 Kbytes (including 128 Kbytes
of data TCM RAM for critical real-time data)
+ 16 Kbytes of instruction TCM RAM (for
critical real-time routines) + 4 Kbytes of
backup SRAM
– Flexible external memory controller with up
to 32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR SDRAM, NOR/NAND
memories
? Dual mode Quad-SPI
The STM32F777VIT6 is based on the high-performance Arm? Cortex?-M7 32-bit RISC core operating at up to 216 MHz frequency. The Cortex?-M7 core features a floating-point unit (FPU) that supports Arm? double-precision and single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances the application security.
STM32F777VIT6 Features
? Core: Arm? 32-bit Cortex?-M7 CPU with
DPFPU, ART Accelerator?, and L1-cache:
16 Kbytes I/D cache, allowing 0-wait state
execution from embedded Flash and external
memories, up to 216 MHz, MPU,
462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1),
and DSP instructions.
? Memories
– Up to 2 Mbytes of Flash memory organized into two banks allowing read-while-write
– SRAM: 512 Kbytes (including 128 Kbytes
of data TCM RAM for critical real-time data)
+ 16 Kbytes of instruction TCM RAM (for
critical real-time routines) + 4 Kbytes of
backup SRAM
– Flexible external memory controller with up
to 32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR SDRAM, NOR/NAND
memories
? Dual mode Quad-SPI
