SIA906EDJ-T1-GE3
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | PowerPAK® SC-70-6 Dual |
| Number of Pins | 6 |
| Weight | 28.009329mg |
| Transistor Element Material | SILICON |
| Manufacturer Package Identifier | C-07431-DUAL |
| Operating Temperature | -55°C~150°C TJ |
| Packaging | Tape & Reel (TR) |
| Published | 2015 |
| Series | TrenchFET® |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| ECCN Code | EAR99 |
| Resistance | 46mOhm |
| Subcategory | FET General Purpose Power |
| Max Power Dissipation | 7.8W |
| Terminal Form | NO LEAD |
| Peak Reflow Temperature (Cel) | 260 |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Pin Count | 6 |
| Qualification Status | Not Qualified |
| Number of Elements | 2 |
| Element Configuration | Dual |
| Operating Mode | ENHANCEMENT MODE |
| Power Dissipation | 1.9W |
| Case Connection | DRAIN |
| Turn On Delay Time | 5 ns |
| FET Type | 2 N-Channel (Dual) |
| Transistor Application | SWITCHING |
| Rds On (Max) @ Id, Vgs | 46m Ω @ 3.9A, 4.5V |
| Vgs(th) (Max) @ Id | 1.4V @ 250μA |
| Input Capacitance (Ciss) (Max) @ Vds | 350pF @ 10V |
| Gate Charge (Qg) (Max) @ Vgs | 12nC @ 10V |
| Rise Time | 12ns |
| Drain to Source Voltage (Vdss) | 20V |
| Fall Time (Typ) | 12 ns |
| Turn-Off Delay Time | 15 ns |
| Continuous Drain Current (ID) | 4.5A |
| Gate to Source Voltage (Vgs) | 12V |
| Drain to Source Breakdown Voltage | 20V |
| FET Technology | METAL-OXIDE SEMICONDUCTOR |
| Max Junction Temperature (Tj) | 150°C |
| FET Feature | Logic Level Gate |
| Height | 850μm |
| Length | 2.05mm |
| Width | 2.05mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
See Relate Datesheet
