SN65LVDS100DRG4
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 1 week ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 8 |
| Weight | 75.891673mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Tape & Reel (TR) |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | Buffer, ReDriver |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | Line Driver or Receivers |
| Max Power Dissipation | 481mW |
| Technology | BIPOLAR |
| Voltage - Supply | 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Base Part Number | 65LVDS100 |
| Output | LVDS |
| Pin Count | 8 |
| Operating Supply Voltage | 3.3V |
| Number of Elements | 1 |
| Operating Supply Current | 30mA |
| Power Dissipation | 481mW |
| Output Current | 12μA |
| Propagation Delay | 800 ps |
| Supply Current-Max | 0.033mA |
| Turn On Delay Time | 800 ps |
| Logic Function | Translator |
| Input | CML, LVDS, LVPECL |
| Driver Number of Bits | 1 |
| Receiver Number of Bits | 1 |
| Interface Standard | EIA-644-A; TIA-644-A |
| Data Rate (Max) | 2Gbps |
| Supply Voltage1-Nom | 3.3V |
| Delay Time | 470ps |
| Capacitance - Input | 0.6pF |
| Height | 1.75mm |
| Length | 4.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN65LVDS100DRG4 Overview
As a convenience to the user, power buffer has been packaged in 8-SOIC (0.154, 3.90mm Width).In Tape & Reel (TR) packages, ready for power buffer.The Surface Mount universal mout has the advantage of being easily adaptable.On the topic of types, I would like to point out that this is a typical Buffer, ReDriver.For its operation, this op amp buffer uses a voltage of 3V~3.6V.There is CML, LVDS, LVPECL input facilitation.It is recommended to set the operating temperature to -40°C~85°C to prevent malfunctions.With "65LVDS100," you will find more pin-to-pin solutions.An op amp buffer of the op amp buffer is equipped with 8 terminals.This material's peak reflow temperature is 260°C.This splitter is supplied with 3.3V voltage, which allows it to perform a variety of demanding tasks.Power buffer pinouts start from 8 pins.In LVDS, it produces output.With 8 pins, it is connected.For mounting on PCBs or other boards, it has a Surface Mount.In the industry, other Line Driver or Receivers like the power buffer play an important role.30mA is the voltage at which this power buffer operates.It is necessary to provide 3.3V operating supply voltage for normal operation.The repeter utilizes a 1-Bit receiver.The splitter dissipates at most 481mW watts.The repeater signal is an interface with a 1 element.Current output from the spliter should be 12μA.
SN65LVDS100DRG4 Features
A standard Line Driver or Receivers.
1-Bit receiver.
SN65LVDS100DRG4 Applications
There are a lot of Texas Instruments SN65LVDS100DRG4 Signal Buffers, Repeaters, Splitters applications.
- Desktop Computers
- Clock Distribution
- SATA SSDs or HDDs
- PECL-to-LVDS Translation
- Network Switches/Routers
- Communications Switchers
- Medical
- Data or Clock Signal Amplification
- Industrial/Embedded PC
- Servers
