SN65LVDT100DR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-SOIC (0.154, 3.90mm Width) |
| Number of Pins | 8 |
| Weight | 75.891673mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Tape & Reel (TR) |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| ECCN Code | EAR99 |
| Type | Buffer, ReDriver |
| Subcategory | Line Driver or Receivers |
| Max Power Dissipation | 481mW |
| Technology | BIPOLAR |
| Voltage - Supply | 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Base Part Number | 65LVDT100 |
| Output | LVDS |
| Pin Count | 8 |
| Operating Supply Voltage | 3.3V |
| Number of Elements | 1 |
| Operating Supply Current | 30mA |
| Power Dissipation | 481mW |
| Output Current | 12μA |
| Propagation Delay | 800 ps |
| Turn On Delay Time | 800 ps |
| Max Output Voltage | 454mV |
| Logic Function | Translator |
| Input | CML, LVDS, LVPECL |
| Driver Number of Bits | 1 |
| Max Input Current | 33μA |
| Receiver Number of Bits | 1 |
| Interface Standard | EIA-644-A; TIA-644-A |
| Data Rate (Max) | 2Gbps |
| Supply Voltage1-Nom | 3.3V |
| Delay Time | 470ps |
| Capacitance - Input | 0.6pF |
| Height | 1.75mm |
| Length | 4.9mm |
| Width | 3.91mm |
| Thickness | 1.58mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN65LVDT100DR Overview
This power buffer comes packaged in 8-SOIC (0.154, 3.90mm Width) so that it can be transported easily.Tape & Reel (TR) packages are ready for power buffer.Adaptable universalism in a single mout.It is a typical Buffer, ReDriver type, if we are talking about types.To operate, this op amp buffer needs 3V~3.6V voltage.CML, LVDS, LVPECL input can be accommodated.For optimal performance, set the operating temperature to -40°C~85°C.You can get more pin-to-pin solutions for your specific needs by searching with "65LVDT100".8 terminals are located on the op amp buffer.It reaches its peak reflow temperature at 260 degrees Celsius.The splitter is supplied with 3.3V voltage, so it is capable of completing a wide range of demanding tasks.Taking the Power buffer's pinout as an example, it starts from the 8 pins it has on its surface.In LVDS, it produces output.8 pins are present on the op amp buffers.A Surface Mount hole is available for mounting it on a PCB or another board.The power buffer and other Line Driver or Receivers play an important role in the industry.A voltage of 30mA is required to operate this power buffer.It is necessary to provide 3.3V operating supply voltage for normal operation.Receiver uses 1-Bit technology.Power dissipation of this splitter is at most 481mW watts.A 1 element interface repeater signal such as this is used.It is recommended that the spliter outputs 12μA as its current output.
SN65LVDT100DR Features
A standard Line Driver or Receivers.
1-Bit receiver.
SN65LVDT100DR Applications
There are a lot of Texas Instruments SN65LVDT100DR Signal Buffers, Repeaters, Splitters applications.
- Clock Distribution
- Desktop Computers
- Backplane Interconnect
- Digital Crossconnects
- PECL-to-LVDS Translation
- Medical
- Portable IPC/HMI
- Clock Distribution
- Storage Area Networks
- Laptop Computers (for External Video Cards)
