Parameters |
Mount |
Through Hole |
Mounting Type |
Through Hole |
Package / Case |
24-DIP (0.300, 7.62mm) |
Number of Pins |
24 |
Weight |
1.753503g |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ABT |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
24 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Technology |
BICMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Supply Voltage |
5V |
Terminal Pitch |
2.54mm |
Base Part Number |
74ABT821 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Operating Supply Voltage |
5V |
Number of Elements |
1 |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Load Capacitance |
50pF |
Number of Ports |
2 |
Output Current |
64mA |
Number of Bits |
10 |
Clock Frequency |
125MHz |
Propagation Delay |
6.2 ns |
Turn On Delay Time |
4.1 ns |
Family |
ABT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
250μA |
Current - Output High, Low |
32mA 64mA |
Max I(ol) |
0.064 A |
Max Propagation Delay @ V, Max CL |
6.2ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Number of Input Lines |
10 |
Number of Output Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
5.08mm |
Width |
7.62mm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74ABT821ANT Overview
The flip flop is packaged in a case of 24-DIP (0.300, 7.62mm). A package named Tubeincludes it. It is configured with Tri-State, Non-Invertedas an output. The trigger it is configured with uses Positive Edge. It is mounted in the way of Through Hole. A voltage of 4.5V~5.5Vis used as the supply voltage. Currently, the operating temperature is -40°C~85°C TA. This D latch has the type D-Type. JK flip flop belongs to the 74ABTseries of FPGAs. A frequency of 125MHzshould be the maximum output frequency. A total of 1elements are present in it. T flip flop consumes 250μA quiescent energy. Terminations are 24. Members of the 74ABT821family make up this object. An input voltage of 5Vpowers the D latch. The input capacitance of this JK flip flopis 3.5pF farads. ABTis the family of this D flip flop. The electronic part is mounted in the way of Through Hole. With its 24pins, it is designed to work with most electronic flip flops. This device has the clock edge trigger type of Positive Edge. There is a FF/Latchesbase part number assigned to the RS flip flops. An electronic part designed with 10bits is used in this application. A total of 5V power supplies are needed to run it. This flip flop has a total of 2ports. For high efficiency, the supply voltage should be kept at 5V. Featuring the maximum design flexibility, it has an output current of 64mA . It operates with 3 output lines. Currently, there are 10 input lines present.
SN74ABT821ANT Features
Tube package
74ABT series
24 pins
10 Bits
5V power supplies
SN74ABT821ANT Applications
There are a lot of Texas Instruments SN74ABT821ANT Flip Flops applications.
- Instrumentation
- Asynchronous counter
- Divide a clock signal by 2 or 4
- Balanced Propagation Delays
- ESD protection
- Memory
- Frequency division
- Registers
- Differential Individual
- ESCC