Parameters |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Number of Input Lines |
4 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
95000000Hz |
Height |
5.08mm |
Length |
19.3mm |
Width |
6.35mm |
Thickness |
3.9mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 1 day ago) |
Contact Plating |
Gold |
Mount |
Through Hole |
Mounting Type |
Through Hole |
Package / Case |
14-DIP (0.300, 7.62mm) |
Number of Pins |
14 |
Weight |
927.99329mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74AC |
JESD-609 Code |
e4 |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
2V~6V |
Terminal Position |
DUAL |
Supply Voltage |
3V |
Base Part Number |
74AC74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
6V |
Power Supplies |
3.3/5V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
24mA |
Clock Frequency |
160MHz |
Propagation Delay |
14 ns |
Quiescent Current |
2μA |
Turn On Delay Time |
6 ns |
Family |
AC |
Logic Function |
Flip-Flop |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
10ns @ 5V, 50pF |
SN74AC74N Overview
14-DIP (0.300, 7.62mm)is the way it is packaged. D flip flop is included in the Tubepackage. T flip flop is configured with an output of Differential. It is configured with a trigger that uses a value of Positive Edge. It is mounted in the way of Through Hole. It operates with a supply voltage of 2V~6V. It is operating at a temperature of -40°C~85°C TA. It is an electronic flip flop with the type D-Type. JK flip flop is a part of the 74ACseries of FPGAs. This D flip flop should not have a frequency greater than 160MHz. In 14terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. This D latch belongs to the family of 74AC74. A voltage of 3V provides power to the D latch. This T flip flop has a capacitance of 3pF farads at the input. A device of this type belongs to the family of AC. There is an electronic part mounted in the way of Through Hole. It is designed with 14 pins. The clock edge trigger type for this device is Positive Edge. The RS flip flops belongs to FF/Latches base part number. 6Vis the maximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be above 2V. The superior flexibility of this product is achieved by using 2 circuits. The D latch runs on a voltage of 3.3/5V volts. Its output current of 24mAallows for maximum design flexibility. Currently, there are 4 lines of input. In terms of quiescent current, it consumes 2μA .
SN74AC74N Features
Tube package
74AC series
14 pins
3.3/5V power supplies
SN74AC74N Applications
There are a lot of Texas Instruments SN74AC74N Flip Flops applications.
- Parallel data storage
- Pattern generators
- Divide a clock signal by 2 or 4
- Load Control
- Shift registers
- Digital electronics systems
- Reduced system switching noise
- ESD protection
- Frequency Divider circuits
- Memory