SN74ACT534PW
| Parameters | |
|---|---|
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ACT534 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 1 |
| Polarity | Inverting |
| Power Supplies | 5V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Number of Bits | 8 |
| Clock Frequency | 100MHz |
| Propagation Delay | 11.5 ns |
| Turn On Delay Time | 2.5 ns |
| Family | ACT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Max Propagation Delay @ V, Max CL | 11.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Power Supply Current-Max (ICC) | 0.04mA |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ACT |
| JESD-609 Code | e4 |
SN74ACT534PW Overview
It is embeded in 20-TSSOP (0.173, 4.40mm Width) case. There is an embedded version in the package Tube. T flip flop is configured with an output of Tri-State, Inverted. This trigger is configured to use Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A 4.5V~5.5Vsupply voltage is required for it to operate. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This D latch has the type D-Type. The FPGA belongs to the 74ACT series. There should be no greater frequency than 100MHzon its output. A total of 1 elements are present. As a result, it consumes 4μA quiescent current. There are 20 terminations,This D latch belongs to the family of 74ACT534. A voltage of 5V is used to power it. The input capacitance of this JK flip flopis 4.5pF farads. The electronic device belongs to the ACTfamily. A part of the electronic system is mounted in the way of Surface Mount. Basically, it is designed with a set of 20 pins. There is a clock edge trigger type of Positive Edgeon this device. The part is included in FF/Latches. There are 8bits in its design. The superior flexibility of this circuit is achieved by using 8 circuits. The D latch operates on 5V volts. There are 2 ports embedded in the flip flops. In order to achieve high efficiency, the supply voltage should be maintained at 5V. Featuring the maximum design flexibility, it has an output current of 24mA . A total of 3input lines have been provided.
SN74ACT534PW Features
Tube package
74ACT series
20 pins
8 Bits
5V power supplies
SN74ACT534PW Applications
There are a lot of Texas Instruments SN74ACT534PW Flip Flops applications.
- Supports Live Insertion
- Consumer
- Divide a clock signal by 2 or 4
- Pattern generators
- ESD protection
- Communications
- Balanced 24 mA output drivers
- Data transfer
- Memory
- 2 – Bit synchronous counter
