Parameters |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
20-SSOP (0.209, 5.30mm Width) |
Number of Pins |
20 |
Weight |
156.687814mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Cut Tape (CT) |
Series |
74ACT |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
20 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TAPE AND REEL |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
NOT SPECIFIED |
Supply Voltage |
5V |
Terminal Pitch |
0.65mm |
Reach Compliance Code |
unknown |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74ACT564 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Inverted |
Number of Elements |
1 |
Polarity |
Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Power Supplies |
5V |
Supply Voltage-Min (Vsup) |
4.5V |
Number of Circuits |
8 |
Load Capacitance |
50pF |
Number of Ports |
2 |
Output Current |
24mA |
Number of Bits |
8 |
Clock Frequency |
90MHz |
Propagation Delay |
10.5 ns |
Turn On Delay Time |
6.5 ns |
Family |
ACT |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
4μA |
Current - Output High, Low |
24mA 24mA |
Max I(ol) |
0.024 A |
Max Propagation Delay @ V, Max CL |
10.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
4.5pF |
Number of Input Lines |
3 |
Clock Edge Trigger Type |
Positive Edge |
Height Seated (Max) |
2mm |
Length |
7.2mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74ACT564DBR Overview
In the form of 20-SSOP (0.209, 5.30mm Width), it has been packaged. D flip flop is embedded in the Cut Tape (CT) package. This output is configured with Tri-State, Inverted. This trigger is configured to use Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. Temperature is set to -40°C~85°C TA. D-Typedescribes this flip flop. It belongs to the 74ACTseries of FPGAs. Its output frequency should not exceed 90MHz. There are 1 elements in it. T flip flop consumes 4μA quiescent energy. 20terminations have occurred. The 74ACT564 family contains this object. A voltage of 5V is used to power it. JK flip flop input capacitance is 4.5pF farads. This D flip flop belongs to the family of ACT. Surface Mount mounts this electronic component. This board is designed with 20pins on it. This device has the clock edge trigger type of Positive Edge. This RS flip flops is a part number FF/Latches. There are 8bits in this flip flop. Vsup reaches 5.5V, the maximal supply voltage. It is imperative that the supply voltage (Vsup) is maintained above 4.5Vin order to ensure normal operation. Its flexibility is enhanced by 8 circuits. As a result of its reliability, this D flip flop is ideally suited for TAPE AND REEL. An electrical current of 5V volts is applied to it. The flip flop has 2embedded ports. With an output current of 24mA, it is possible to design the device in any way you want. There are 3 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
SN74ACT564DBR Features
Cut Tape (CT) package
74ACT series
20 pins
8 Bits
5V power supplies
SN74ACT564DBR Applications
There are a lot of Texas Instruments SN74ACT564DBR Flip Flops applications.
- Cold spare funcion
- Instrumentation
- Circuit Design
- Shift Registers
- Frequency Divider circuits
- Communications
- Balanced 24 mA output drivers
- 2 – Bit synchronous counter
- QML qualified product
- Count Modes