SN74ACT564DBRE4
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-SSOP (0.209, 5.30mm Width) |
| Number of Pins | 20 |
| Weight | 156.687814mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74ACT |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Reach Compliance Code | unknown |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ACT564 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Inverted |
| Number of Elements | 1 |
| Polarity | Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 24mA |
| Clock Frequency | 90MHz |
| Propagation Delay | 10.5 ns |
| Turn On Delay Time | 6.5 ns |
| Family | ACT |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 4μA |
| Current - Output High, Low | 24mA 24mA |
| Max I(ol) | 0.024 A |
| Number of Bits per Element | 8 |
| Max Propagation Delay @ V, Max CL | 10.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4.5pF |
| Number of Input Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Height Seated (Max) | 2mm |
| Length | 7.2mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74ACT564DBRE4 Overview
The package is in the form of 20-SSOP (0.209, 5.30mm Width). It is included in the package Tape & Reel (TR). There is a Tri-State, Invertedoutput configured with it. In the configuration of the trigger, Positive Edgeis used. There is an electronic component mounted in the way of Surface Mount. The JK flip flop operates at 4.5V~5.5Vvolts. In this case, the operating temperature is -40°C~85°C TA. This electronic flip flop is of type D-Type. In FPGA terms, D flip flop is a type of 74ACTseries FPGA. You should not exceed 90MHzin the output frequency of the device. In total, it contains 1 elements. This process consumes 4μA quiescents. Terminations are 20. This D latch belongs to the family of 74ACT564. Power is supplied from a voltage of 5V volts. JK flip flop input capacitance is 4.5pF farads. Devices in the ACTfamily are electronic devices. A part of the electronic system is mounted in the way of Surface Mount. This board is designed with 20pins on it. This device has the clock edge trigger type of Positive Edge. The part is included in FF/Latches. As soon as 5.5Vis reached, Vsup reaches its maximum value. Keeping the supply voltage (Vsup) above 4.5V is necessary for normal operation. Considering its reliability, this T flip flop is well suited for TAPE AND REEL. The D latch operates on 5V volts. The flip flop contains 2ports. The output current of 24mA makes it feature maximum design flexibility. It is reported that there are 3 input lines.
SN74ACT564DBRE4 Features
Tape & Reel (TR) package
74ACT series
20 pins
5V power supplies
SN74ACT564DBRE4 Applications
There are a lot of Texas Instruments SN74ACT564DBRE4 Flip Flops applications.
- QML qualified product
- Event Detectors
- Automotive
- Data Synchronizers
- Circuit Design
- Asynchronous counter
- Instrumentation
- Memory
- Control circuits
- Single Down Count-Control Line
