Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 6 days ago) |
Contact Plating |
Gold |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-SOIC (0.154, 3.90mm Width) |
Number of Pins |
14 |
Weight |
129.387224mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74ACT |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
4.5V~5.5V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
5V |
Base Part Number |
74ACT74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Operating Supply Voltage |
5V |
Polarity |
Non-Inverting |
Power Supplies |
5V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
50mA |
Clock Frequency |
210MHz |
Propagation Delay |
11 ns |
Quiescent Current |
2μA |
Turn On Delay Time |
5.5 ns |
Family |
ACT |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
7.5ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3pF |
Number of Input Lines |
4 |
Clock Edge Trigger Type |
Positive Edge |
Height |
1.75mm |
Length |
8.65mm |
Width |
3.91mm |
Thickness |
1.58mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74ACT74DR Overview
The package is in the form of 14-SOIC (0.154, 3.90mm Width). As part of the package Tape & Reel (TR), it is embedded. As configured, the output uses Differential. It is configured with the trigger Positive Edge. Surface Mountmounts this electrical part. It operates with a supply voltage of 4.5V~5.5V. It is at -40°C~85°C TAdegrees Celsius that the system is operating. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74ACTseries FPGA. Its output frequency should not exceed 210MHz Hz. Currently, there are 14 terminations. D latch belongs to the 74ACT74 family. An input voltage of 5Vpowers the D latch. There is 3pF input capacitance for this T flip flop. It belongs to the family of electronic devices known as ACT. It is mounted by the way of Surface Mount. The 14pins are designed into the board. The clock edge trigger type for this device is Positive Edge. It is part of the FF/Latchesbase part number family. The superior flexibility is achieved through the use of 2 circuits. A reliable performance of this D flip flop makes it well suited for use in TR. A power supply of 5Vis required to operate it. Optimal efficiency requires a supply voltage of 5V. In addition to its maximum design flexibility, the output current of the T flip flop is 50mA. A total of 4input lines have been provided. As a result, it consumes 2μA of quiescent current without being affected by external factors.
SN74ACT74DR Features
Tape & Reel (TR) package
74ACT series
14 pins
5V power supplies
SN74ACT74DR Applications
There are a lot of Texas Instruments SN74ACT74DR Flip Flops applications.
- Parallel data storage
- Pattern generators
- Test & Measurement
- Digital electronics systems
- Counters
- Balanced Propagation Delays
- ATE
- Dynamic threshold performance
- Single Up Count-Control Line
- Storage registers