SN74AHC374PWR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 6 days ago) |
| Contact Plating | Gold |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 20-TSSOP (0.173, 4.40mm Width) |
| Number of Pins | 20 |
| Weight | 76.997305mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74AHC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 2V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.65mm |
| Base Part Number | 74AHC374 |
| Function | Standard |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 5.5V |
| Power Supplies | 2/5.5V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8 |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 8mA |
| Number of Bits | 8 |
| Clock Frequency | 120MHz |
| Propagation Delay | 16.2 ns |
| Quiescent Current | 4μA |
| Turn On Delay Time | 1 ns |
| Family | AHC/VHC/H/U/V |
| Logic Function | D-Type, Flip-Flop |
| Current - Output High, Low | 8mA 8mA |
| Max Propagation Delay @ V, Max CL | 6.9ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Input Capacitance | 4pF |
| Power Supply Current-Max (ICC) | 0.04mA |
| Number of Input Lines | 3 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 75000000Hz |
| Height | 1.2mm |
| Length | 6.5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74AHC374PWR Overview
It is embeded in 20-TSSOP (0.173, 4.40mm Width) case. You can find it in the Cut Tape (CT)package. This output is configured with Tri-State, Non-Inverted. Positive Edgeis the trigger it is configured with. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2V~5.5V volts. Currently, the operating temperature is -40°C~85°C TA. This D latch has the type D-Type. In terms of FPGAs, it belongs to the 74AHC series. This D flip flop should not have a frequency greater than 120MHz. A total of 1 elements are present. A total of 20terminations have been recorded. JK flip flop belongs to 74AHC374 family. Power is provided by a 3.3V supply. A 4pFfarad input capacitance is provided by this T flip flop. AHC/VHC/H/U/Vis the family of this D flip flop. It is mounted by the way of Surface Mount. There are 20pins on it. This device has Positive Edgeas its clock edge trigger type. The part you are looking for is included in FF/Latches. This flip flop is designed with 8 Bits. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. A normal operating voltage (Vsup) should remain above 2V. Its flexibility is enhanced by 8 circuits. As a result of its reliability, this D flip flop is ideally suited for TR. In order for the device to operate, it requires 2/5.5V power supplies. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. This T flip flop features a maximum design flexibility due to its output current of 8mA. This input has 3lines. This D latch consumes 4μA quiescent current at all.
SN74AHC374PWR Features
Cut Tape (CT) package
74AHC series
20 pins
8 Bits
2/5.5V power supplies
SN74AHC374PWR Applications
There are a lot of Texas Instruments SN74AHC374PWR Flip Flops applications.
- ESD protection
- High Performance Logic for test systems
- Latch
- Communications
- Load Control
- Balanced 24 mA output drivers
- Bus hold
- Event Detectors
- Pattern generators
- Buffer registers
