Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 4 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-VFQFN Exposed Pad |
Number of Pins |
14 |
Weight |
32.205058mg |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Cut Tape (CT) |
Series |
74AHC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
2 (1 Year) |
Number of Terminations |
14 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
2V~5.5V |
Terminal Position |
QUAD |
Terminal Form |
NO LEAD |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74AHC74 |
Function |
Set(Preset) and Reset |
Qualification Status |
Not Qualified |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
8mA |
Clock Frequency |
115MHz |
Propagation Delay |
15.4 ns |
Turn On Delay Time |
1 ns |
Family |
AHC/VHC/H/U/V |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
2μA |
Current - Output High, Low |
8mA 8mA |
Max I(ol) |
0.008 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
9.3ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
2pF |
Number of Input Lines |
4 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
75000000Hz |
Height |
1mm |
Length |
3.5mm |
Width |
3.5mm |
Thickness |
900μm |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74AHC74RGYR Overview
It is packaged in the way of 14-VFQFN Exposed Pad. There is an embedded version in the package Cut Tape (CT). T flip flop uses Differentialas the output. Positive Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. A 2V~5.5Vsupply voltage is required for it to operate. A temperature of -40°C~125°C TAis used in the operation. This logic flip flop is classified as type D-Type. In terms of FPGAs, it belongs to the 74AHC series. Its output frequency should not exceed 115MHz Hz. There is a consumption of 2μAof quiescent energy. It has been determined that there have been 14 terminations. The 74AHC74 family contains this object. A voltage of 3.3V is used as the power supply for this D latch. JK flip flop input capacitance is 2pF farads. The electronic device belongs to the AHC/VHC/H/U/Vfamily. In this case, the electronic component is mounted in the way of Surface Mount. It is designed with 14 pins. In this device, the clock edge trigger type is Positive Edge. This RS flip flops is a part number FF/Latches. There is a 5.5Vmaximum supply voltage (Vsup). For normal operation, the supply voltage (Vsup) should be kept above 2V. In order to achieve its superior flexibility, 2 circuits are used. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TR. The output current of 8mA makes it feature maximum design flexibility. There are 4 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
SN74AHC74RGYR Features
Cut Tape (CT) package
74AHC series
14 pins
SN74AHC74RGYR Applications
There are a lot of Texas Instruments SN74AHC74RGYR Flip Flops applications.
- Counters
- Balanced 24 mA output drivers
- Load Control
- Data transfer
- Parallel data storage
- Pattern generators
- Supports Live Insertion
- Registers
- Convert a momentary switch to a toggle switch
- ATE