Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 4 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
14-VFQFN Exposed Pad |
Number of Pins |
14 |
Weight |
32.205058mg |
Operating Temperature |
-40°C~125°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74AHC |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
2 (1 Year) |
Number of Terminations |
14 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
CMOS |
Voltage - Supply |
2V~5.5V |
Terminal Position |
QUAD |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
3.3V |
Terminal Pitch |
0.5mm |
Base Part Number |
74AHC74 |
Function |
Set(Preset) and Reset |
Output Type |
Differential |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
5.5V |
Supply Voltage-Min (Vsup) |
2V |
Number of Circuits |
2 |
Load Capacitance |
50pF |
Output Current |
8mA |
Clock Frequency |
115MHz |
Propagation Delay |
15.4 ns |
Turn On Delay Time |
1 ns |
Family |
AHC/VHC/H/U/V |
Logic Function |
AND, D-Type, Flip-Flop |
Current - Quiescent (Iq) |
2μA |
Current - Output High, Low |
8mA 8mA |
Max I(ol) |
0.008 A |
Number of Bits per Element |
1 |
Max Propagation Delay @ V, Max CL |
9.3ns @ 5V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
2pF |
Number of Input Lines |
4 |
Clock Edge Trigger Type |
Positive Edge |
Max Frequency@Nom-Sup |
75000000Hz |
Height |
1mm |
Length |
3.5mm |
Width |
3.5mm |
Thickness |
900μm |
Radiation Hardening |
No |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74AHC74RGYRG4 Overview
The flip flop is packaged in 14-VFQFN Exposed Pad. Package Tape & Reel (TR)embeds it. This output is configured with Differential. It is configured with the trigger Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates at 2V~5.5Vvolts. -40°C~125°C TAis the operating temperature. This D latch has the type D-Type. In this case, it is a type of FPGA belonging to the 74AHC series. You should not exceed 115MHzin its output frequency. There is 2μA quiescent consumption. A total of 14 terminations have been made. The 74AHC74family includes it. A voltage of 3.3V provides power to the D latch. JK flip flop input capacitance is 2pF farads. A device of this type belongs to the family of AHC/VHC/H/U/V. There is an electronic component mounted in the way of Surface Mount. The electronic flip flop is designed with pins 14. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. There is a base part number FF/Latchesfor the RS flip flops. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. Keeping the supply voltage (Vsup) above 2V is necessary for normal operation. The superior flexibility of this product is achieved by using 2 circuits. On the basis of its reliable performance, this D flip flop is well suited for use with TR. The 8mA output current allows it to be designed with the greatest amount of flexibility. As of now, there are 4input lines.
SN74AHC74RGYRG4 Features
Tape & Reel (TR) package
74AHC series
14 pins
SN74AHC74RGYRG4 Applications
There are a lot of Texas Instruments SN74AHC74RGYRG4 Flip Flops applications.
- Reduced system switching noise
- Synchronous counter
- Guaranteed simultaneous switching noise level
- Safety Clamp
- Balanced Propagation Delays
- Data Synchronizers
- Convert a momentary switch to a toggle switch
- Individual Asynchronous Resets
- Single Down Count-Control Line
- Balanced 24 mA output drivers