SN74ALVCH162820DL
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 56 |
| Weight | 694.790113mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tube |
| Series | 74ALVCH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| Termination | SMD/SMT |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Base Part Number | 74ALVCH162820 |
| Function | Standard |
| Number of Outputs | 20 |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Number of Ports | 2 |
| Output Current | 12mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 6.2 ns |
| Turn On Delay Time | 1 ns |
| Family | ALVC/VCX/A |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 12mA 12mA |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 5.4ns @ 3.3V, 30pF |
| Prop. Delay@Nom-Sup | 5.4 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 7.49mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74ALVCH162820DL Overview
In the form of 56-BSSOP (0.295, 7.50mm Width), it has been packaged. As part of the package Tube, it is embedded. T flip flop uses Tri-State, Non-Invertedas its output configuration. In the configuration of the trigger, Positive Edgeis used. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. It is at -40°C~85°C TAdegrees Celsius that the system is operating. This logic flip flop is classified as type D-Type. The FPGA belongs to the 74ALVCH series. Its output frequency should not exceed 150MHz Hz. A total of 1elements are contained within it. During its operation, it consumes 40μA quiescent energy. 56terminations have occurred. JK flip flop belongs to 74ALVCH162820 family. A voltage of 1.8V provides power to the D latch. Its input capacitance is 3.5pF farads. It belongs to the family of electronic devices known as ALVC/VCX/A. There is an electronic part that is mounted in the way of Surface Mount. A total of 56pins are provided on this board. This device has the clock edge trigger type of Positive Edge. This device is part of the FF/Latchesbase part number family. To achieve this superior flexibility, 2 circuits are used. This flip flop has a total of 2ports. Its output current of 12mAallows for maximum design flexibility. There are 3 output lines on it.
SN74ALVCH162820DL Features
Tube package
74ALVCH series
56 pins
SN74ALVCH162820DL Applications
There are a lot of Texas Instruments SN74ALVCH162820DL Flip Flops applications.
- CMOS Process
- High Performance Logic for test systems
- Cold spare funcion
- Automotive
- Reduced system switching noise
- Memory
- Storage Registers
- Data storage
- Guaranteed simultaneous switching noise level
- Test & Measurement
