Parameters |
Mounting Type |
Surface Mount |
Package / Case |
56-TFSOP (0.173, 4.40mm Width) |
Surface Mount |
YES |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tape & Reel (TR) |
Series |
74ALVCH |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Obsolete |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
56 |
Type |
D-Type |
Terminal Finish |
NICKEL PALLADIUM GOLD |
Additional Feature |
WITH CLOCK ENABLE |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Terminal Pitch |
0.4mm |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
JESD-30 Code |
R-PDSO-G56 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
1 |
Supply Voltage-Max (Vsup) |
3.6V |
Number of Ports |
2 |
Clock Frequency |
150MHz |
Family |
ALVC/VCX/A |
Current - Quiescent (Iq) |
40μA |
Output Characteristics |
3-STATE |
Current - Output High, Low |
24mA 24mA |
Output Polarity |
TRUE |
Number of Bits per Element |
20 |
Max Propagation Delay @ V, Max CL |
4.3ns @ 3.3V, 30pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Propagation Delay (tpd) |
5.6 ns |
Width |
4.4mm |
RoHS Status |
ROHS3 Compliant |
SN74ALVCH16721DGVR Overview
In the form of 56-TFSOP (0.173, 4.40mm Width), it has been packaged. Package Tape & Reel (TR)embeds it. This output is configured with Tri-State, Non-Inverted. JK flip flop uses Positive Edgeas the trigger. It is mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. It is an electronic flip flop with the type D-Type. It is a type of FPGA belonging to the 74ALVCH series. It should not exceed 150MHzin terms of its output frequency. The element count is 1 . It consumes 40μA of quiescent There are 56 terminations,Power is supplied from a voltage of 1.8V volts. Its input capacitance is 3.5pF farads. In terms of electronic devices, this device belongs to the ALVC/VCX/Afamily of devices. Vsup reaches its maximum value at 3.6V. A total of 2ports are embedded in the D flip flop. There is also a characteristic of WITH CLOCK ENABLE.
SN74ALVCH16721DGVR Features
Tape & Reel (TR) package
74ALVCH series
SN74ALVCH16721DGVR Applications
There are a lot of Rochester Electronics, LLC SN74ALVCH16721DGVR Flip Flops applications.
- Set-reset capability
- Individual Asynchronous Resets
- Functionally equivalent to the MC10/100EL29
- Counters
- Single Down Count-Control Line
- Instrumentation
- Control circuits
- Synchronous counter
- Buffer registers
- Consumer