SN74ALVCH16820DLR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-BSSOP (0.295, 7.50mm Width) |
| Number of Pins | 56 |
| Weight | 694.790113mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74ALVCH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TAPE AND REEL |
| Technology | CMOS |
| Voltage - Supply | 1.65V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.8V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ALVCH16820 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Number of Circuits | 2 |
| Number of Ports | 2 |
| Output Current | 24mA |
| Clock Frequency | 150MHz |
| Propagation Delay | 5.5 ns |
| Turn On Delay Time | 1 ns |
| Family | ALVC/VCX/A |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 40μA |
| Current - Output High, Low | 24mA 24mA |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 4.8ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 4.8 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Number of Output Lines | 3 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 7.49mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74ALVCH16820DLR Overview
The flip flop is packaged in a case of 56-BSSOP (0.295, 7.50mm Width). Package Cut Tape (CT)embeds it. As configured, the output uses Tri-State, Non-Inverted. In the configuration of the trigger, Positive Edgeis used. There is an electric part mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. It is operating at -40°C~85°C TA. A flip flop of this type is classified as a D-Type. FPGAs belonging to the 74ALVCHseries contain this type of chip. A frequency of 150MHzshould be the maximum output frequency. D latch consists of 1 elements. This process consumes 40μA quiescents. The number of terminations is 56. Members of the 74ALVCH16820family make up this object. An input voltage of 1.8Vpowers the D latch. This T flip flop has a capacitance of 3.5pF farads at the input. In this case, the D flip flop belongs to the ALVC/VCX/Afamily. Surface Mount mounts this electronic component. A total of 56pins are provided on this board. This device has Positive Edgeas its clock edge trigger type. There is a base part number FF/Latchesfor the RS flip flops. To achieve this superior flexibility, 2 circuits are used. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. The flip flop has 2ports embedded within it. With an output current of 24mA, it is possible to design the device in any way you want. The JK flip flop is with 3 output lines to operate.
SN74ALVCH16820DLR Features
Cut Tape (CT) package
74ALVCH series
56 pins
SN74ALVCH16820DLR Applications
There are a lot of Texas Instruments SN74ALVCH16820DLR Flip Flops applications.
- Frequency Divider circuits
- Differential Individual
- Event Detectors
- Storage Registers
- Communications
- ESD performance
- Instrumentation
- Cold spare funcion
- Bounce elimination switch
- Asynchronous counter
