Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
56-BSSOP (0.295, 7.50mm Width) |
Number of Pins |
56 |
Weight |
694.790113mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Tube |
Series |
74ALVCH |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
56 |
Termination |
SMD/SMT |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Technology |
CMOS |
Voltage - Supply |
1.65V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
1.8V |
Base Part Number |
74ALVCH16821 |
Function |
Standard |
Output Type |
Tri-State, Non-Inverted |
Max Output Current |
24mA |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Load Capacitance |
50pF |
Number of Ports |
2 |
Output Current |
24mA |
Number of Bits |
20 |
Clock Frequency |
150MHz |
Propagation Delay |
5.3 ns |
Turn On Delay Time |
1 ns |
Family |
ALVC/VCX/A |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
40μA |
Current - Output High, Low |
24mA 24mA |
Number of Bits per Element |
10 |
Max Propagation Delay @ V, Max CL |
4.5ns @ 3.3V, 50pF |
Prop. Delay@Nom-Sup |
4.5 ns |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Power Supply Current-Max (ICC) |
0.04mA |
Number of Input Lines |
3 |
Number of Output Lines |
1 |
Count Direction |
UNIDIRECTIONAL |
Clock Edge Trigger Type |
Positive Edge |
Translation |
N/A |
Height |
2.79mm |
Length |
18.41mm |
Width |
7.49mm |
Thickness |
2.59mm |
Radiation Hardening |
No |
REACH SVHC |
No SVHC |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74ALVCH16821DL Overview
The item is packaged in 56-BSSOP (0.295, 7.50mm Width)cases. D flip flop is included in the Tubepackage. This output is configured with Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. It is mounted in the way of Surface Mount. Powered by a 1.65V~3.6Vvolt supply, it operates as follows. A temperature of -40°C~85°C TAis used in the operation. It belongs to the type D-Typeof flip flops. The FPGA belongs to the 74ALVCH series. Its output frequency should not exceed 150MHz. D latch consists of 2 elements. During its operation, it consumes 40μA quiescent energy. Terminations are 56. If you search by 74ALVCH16821, you will find similar parts. The power source is powered by 1.8V. Its input capacitance is 3.5pFfarads. An electronic device belonging to the family ALVC/VCX/Acan be found here. There is an electronic part mounted in the way of Surface Mount. As you can see from the design, it has pins with 56. In this device, the clock edge trigger type is Positive Edge. This part is included in FF/Latches. It is designed with 20bits. There are 2 ports embedded in the flip flops. With an output current of 24mA, this device offers maximum design flexibility. It operates with 1 output lines. There are 3 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
SN74ALVCH16821DL Features
Tube package
74ALVCH series
56 pins
20 Bits
SN74ALVCH16821DL Applications
There are a lot of Texas Instruments SN74ALVCH16821DL Flip Flops applications.
- Frequency division
- High Performance Logic for test systems
- ESD performance
- 2 – Bit synchronous counter
- Synchronous counter
- Parallel data storage
- Reduced system switching noise
- Matched Rise and Fall
- CMOS Process
- Power down protection