Parameters |
Factory Lead Time |
1 Week |
Lifecycle Status |
ACTIVE (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
48-BSSOP (0.295, 7.50mm Width) |
Number of Pins |
48 |
Weight |
600.301152mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Cut Tape (CT) |
Series |
74ALVTH |
JESD-609 Code |
e4 |
Pbfree Code |
yes |
Part Status |
Active |
Moisture Sensitivity Level (MSL) |
1 (Unlimited) |
Number of Terminations |
48 |
ECCN Code |
EAR99 |
Type |
D-Type |
Terminal Finish |
Nickel/Palladium/Gold (Ni/Pd/Au) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
BICMOS |
Voltage - Supply |
2.3V~2.7V 3V~3.6V |
Terminal Position |
DUAL |
Terminal Form |
GULL WING |
Peak Reflow Temperature (Cel) |
260 |
Supply Voltage |
2.5V |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74ALVTH16374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
2 |
Polarity |
Non-Inverting |
Number of Ports |
2 |
Output Current |
64mA |
Number of Bits |
16 |
Clock Frequency |
250MHz |
Propagation Delay |
3.2 ns |
Turn On Delay Time |
1.5 ns |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
100μA |
Current - Output High, Low |
8mA 24mA; 32mA 64mA |
Max I(ol) |
0.064 A |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
3.2ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Power Supply Current-Max (ICC) |
4.5mA |
Number of Input Lines |
3 |
Number of Output Lines |
1 |
Count Direction |
UNIDIRECTIONAL |
Clock Edge Trigger Type |
Positive Edge |
Translation |
N/A |
Height |
2.79mm |
Length |
15.88mm |
Width |
7.49mm |
Thickness |
2.59mm |
RoHS Status |
ROHS3 Compliant |
Lead Free |
Lead Free |
SN74ALVTH16374DLR Overview
The item is packaged in 48-BSSOP (0.295, 7.50mm Width)cases. The package Cut Tape (CT)contains it. There is a Tri-State, Non-Invertedoutput configured with it. It is configured with a trigger that uses Positive Edge. There is an electric part mounted in the way of Surface Mount. Powered by a 2.3V~2.7V 3V~3.6Vvolt supply, it operates as follows. The operating temperature is -40°C~85°C TA. It is an electronic flip flop with the type D-Type. JK flip flop is a part of the 74ALVTHseries of FPGAs. There should be no greater frequency than 250MHzon its output. In total, it contains 2 elements. There is 100μA quiescent consumption. There have been 48 terminations. JK flip flop belongs to 74ALVTH16374 family. An input voltage of 2.5Vpowers the D latch. There is 3.5pF input capacitance for this T flip flop. There is an electronic part mounted in the way of Surface Mount. With its 48pins, it is designed to work with most electronic flip flops. This device's clock edge trigger type is Positive Edge. This part is included in FF/Latches. The design is based on 16bits. As a result of its reliability, this D flip flop is ideally suited for TR. The flip flop has 2embedded ports. The 64mA output current allows it to be designed with the greatest amount of flexibility. It is designed with 1 output lines. As of now, there are 3input lines.
SN74ALVTH16374DLR Features
Cut Tape (CT) package
74ALVTH series
48 pins
16 Bits
SN74ALVTH16374DLR Applications
There are a lot of Texas Instruments SN74ALVTH16374DLR Flip Flops applications.
- Count Modes
- Automotive
- Matched Rise and Fall
- Load Control
- Functionally equivalent to the MC10/100EL29
- Circuit Design
- Dynamic threshold performance
- CMOS Process
- Communications
- Computers