SN74ALVTH16821VR
| Parameters | |
|---|---|
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-TFSOP (0.173, 4.40mm Width) |
| Number of Pins | 56 |
| Weight | 145.007811mg |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Cut Tape (CT) |
| Series | 74ALVTH |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 56 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | BICMOS |
| Voltage - Supply | 2.3V~2.7V 3V~3.6V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.4mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74ALVTH16821 |
| Function | Standard |
| Qualification Status | Not Qualified |
| Output Type | Tri-State, Non-Inverted |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Number of Ports | 2 |
| Output Current | 64mA |
| Number of Bits | 20 |
| Clock Frequency | 150MHz |
| Propagation Delay | 3.5 ns |
| Turn On Delay Time | 1 ns |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 100μA |
| Current - Output High, Low | 8mA 24mA; 32mA 64mA |
| Max I(ol) | 0.064 A |
| Number of Bits per Element | 10 |
| Max Propagation Delay @ V, Max CL | 3.5ns @ 3.3V, 50pF |
| Prop. Delay@Nom-Sup | 4.4 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 3.5pF |
| Power Supply Current-Max (ICC) | 5mA |
| Number of Input Lines | 3 |
| Number of Output Lines | 1 |
| Count Direction | UNIDIRECTIONAL |
| Clock Edge Trigger Type | Positive Edge |
| Translation | N/A |
| Height | 1.2mm |
| Length | 11.3mm |
| Width | 4.4mm |
| Thickness | 1.05mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SN74ALVTH16821VR Overview
The item is packaged in 56-TFSOP (0.173, 4.40mm Width)cases. As part of the package Cut Tape (CT), it is embedded. T flip flop uses Tri-State, Non-Invertedas its output configuration. Positive Edgeis the trigger it is configured with. Surface Mountis occupied by this electronic component. The supply voltage is set to 2.3V~2.7V 3V~3.6V. It is operating at -40°C~85°C TA. It belongs to the type D-Typeof flip flops. It is a type of FPGA belonging to the 74ALVTH series. You should not exceed 150MHzin the output frequency of the device. A total of 2elements are contained within it. It consumes 100μA of quiescent Currently, there are 56 terminations. The 74ALVTH16821 family contains this object. It is powered from a supply voltage of 2.5V. This JK flip flop has a 3.5pFfarad input capacitance. There is an electronic component mounted in the way of Surface Mount. The 56pins are designed into the board. In this device, the clock edge trigger type is Positive Edge. This device has the base part number FF/Latches. 20bits are used in its design. Due to its reliability, this T flip flop is well suited for TR. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. With a current output of 64mA , it offers maximum design flexibility. There are no output lines on the JK flip flop. There are 3 input Lines, which consist of an electronic circuit connected between the ac mains and the rectifier input stage of the switching power supply.
SN74ALVTH16821VR Features
Cut Tape (CT) package
74ALVTH series
56 pins
20 Bits
SN74ALVTH16821VR Applications
There are a lot of Texas Instruments SN74ALVTH16821VR Flip Flops applications.
- Instrumentation
- Safety Clamp
- Frequency Dividers
- Storage registers
- Divide a clock signal by 2 or 4
- Frequency division
- EMI reduction circuitry
- Dynamic threshold performance
- Individual Asynchronous Resets
- CMOS Process
