Parameters |
Lifecycle Status |
LIFEBUY (Last Updated: 3 days ago) |
Mount |
Surface Mount |
Mounting Type |
Surface Mount |
Package / Case |
96-LFBGA |
Number of Pins |
96 |
Weight |
174.20782mg |
Operating Temperature |
-40°C~85°C TA |
Packaging |
Cut Tape (CT) |
Series |
74ALVTH |
JESD-609 Code |
e0 |
Part Status |
Last Time Buy |
Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
Number of Terminations |
96 |
Type |
D-Type |
Terminal Finish |
Tin/Lead (Sn/Pb) |
Subcategory |
FF/Latches |
Packing Method |
TR |
Technology |
BICMOS |
Voltage - Supply |
2.3V~2.7V 3V~3.6V |
Terminal Position |
BOTTOM |
Terminal Form |
BALL |
Peak Reflow Temperature (Cel) |
235 |
Supply Voltage |
2.5V |
Reach Compliance Code |
not_compliant |
Time@Peak Reflow Temperature-Max (s) |
NOT SPECIFIED |
Base Part Number |
74ALVTH32374 |
Function |
Standard |
Qualification Status |
Not Qualified |
Output Type |
Tri-State, Non-Inverted |
Number of Elements |
4 |
Polarity |
Non-Inverting |
Supply Voltage-Max (Vsup) |
2.7V |
Number of Ports |
2 |
Number of Bits |
32 |
Clock Frequency |
250MHz |
Propagation Delay |
3.2 ns |
Turn On Delay Time |
1 ns |
Logic Function |
D-Type, Flip-Flop |
Current - Quiescent (Iq) |
100μA |
Current - Output High, Low |
8mA 24mA; 32mA 64mA |
Number of Bits per Element |
8 |
Max Propagation Delay @ V, Max CL |
3.2ns @ 3.3V, 50pF |
Trigger Type |
Positive Edge |
Input Capacitance |
3.5pF |
Power Supply Current-Max (ICC) |
5mA |
Number of Input Lines |
3 |
Number of Output Lines |
1 |
Count Direction |
UNIDIRECTIONAL |
Clock Edge Trigger Type |
Positive Edge |
Translation |
N/A |
Height |
1.4mm |
Length |
13.5mm |
Width |
5.5mm |
Thickness |
900μm |
RoHS Status |
Non-RoHS Compliant |
Lead Free |
Contains Lead |
SN74ALVTH32374KR Overview
The flip flop is packaged in a case of 96-LFBGA. There is an embedded version in the package Cut Tape (CT). T flip flop uses Tri-State, Non-Invertedas its output configuration. This trigger is configured to use Positive Edge. This electronic part is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2.3V~2.7V 3V~3.6V volts. Temperature is set to -40°C~85°C TA. It is an electronic flip flop with the type D-Type. JK flip flop is a part of the 74ALVTHseries of FPGAs. It should not exceed 250MHzin terms of its output frequency. There are 4 elements in it. As a result, it consumes 100μA quiescent current and is not affected by external forces. A total of 96terminations have been recorded. This D latch belongs to the family of 74ALVTH32374. The power source is powered by 2.5V. JK flip flop input capacitance is 3.5pF farads. There is an electronic part mounted in the way of Surface Mount. 96pins are included in its design. This device's clock edge trigger type is Positive Edge. The part is included in FF/Latches. Flip flops designed with 32bits are used in this part. The maximal supply voltage (Vsup) reaches 2.7V. In light of its reliable performance, this T flip flop is well suited for TR. The flip flop has 2ports embedded within it. There are 1 output lines in this JK flip flop. As of now, there are 3input lines.
SN74ALVTH32374KR Features
Cut Tape (CT) package
74ALVTH series
96 pins
32 Bits
SN74ALVTH32374KR Applications
There are a lot of Texas Instruments SN74ALVTH32374KR Flip Flops applications.
- Event Detectors
- Parallel data storage
- CMOS Process
- Matched Rise and Fall
- Instrumentation
- High Performance Logic for test systems
- Differential Individual
- Digital electronics systems
- Data storage
- Test & Measurement