SN74AS876DWE4
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 24-SOIC (0.295, 7.50mm Width) |
| Number of Pins | 24 |
| Weight | 624.398247mg |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tube |
| Series | 74AS |
| JESD-609 Code | e4 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 24 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Additional Feature | WITH PRESET |
| Subcategory | FF/Latches |
| Technology | TTL |
| Voltage - Supply | 4.5V~5.5V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 5V |
| Base Part Number | 74AS876 |
| Function | Master Reset |
| Output Type | Tri-State, Inverted |
| Operating Supply Voltage | 5V |
| Number of Elements | 2 |
| Polarity | Inverting |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Output Current | 48mA |
| Number of Bits | 8 |
| Clock Frequency | 80MHz |
| Propagation Delay | 10.5 ns |
| Turn On Delay Time | 3 ns |
| Family | AS |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 142mA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 15mA 48mA |
| Number of Bits per Element | 4 |
| Max Propagation Delay @ V, Max CL | 10.5ns @ 5V, 50pF |
| Trigger Type | Positive Edge |
| Number of Output Lines | 1 |
| Clock Edge Trigger Type | Positive Edge |
| Width | 7.5mm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74AS876DWE4 Overview
The item is packaged in 24-SOIC (0.295, 7.50mm Width)cases. D flip flop is embedded in the Tube package. In the configuration, Tri-State, Invertedis used as the output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. It operates with a supply voltage of 4.5V~5.5V. A temperature of 0°C~70°C TAis considered to be the operating temperature. D-Typedescribes this flip flop. FPGAs belonging to the 74ASseries contain this type of chip. In order for it to function properly, its output frequency should not exceed 80MHz. D latch consists of 2 elements. T flip flop consumes 142mA quiescent energy. A total of 24 terminations have been made. You can search similar parts based on 74AS876. A voltage of 5V is used as the power supply for this D latch. An electronic device belonging to the family AScan be found here. It is mounted in the way of Surface Mount. There are 24pins on it. The clock edge trigger type for this device is Positive Edge. The part you are looking for is included in FF/Latches. It is designed with a number of bits of 8. The flip flop has 2ports embedded within it. For high efficiency, the supply voltage should be kept at 5V. In addition to its maximum design flexibility, the output current of the T flip flop is 48mA. In order to operate, the chip has 1 output lines. Additionally, you may refer to the additional WITH PRESET of the electronic flip flop.
SN74AS876DWE4 Features
Tube package
74AS series
24 pins
8 Bits
SN74AS876DWE4 Applications
There are a lot of Texas Instruments SN74AS876DWE4 Flip Flops applications.
- Computing
- Matched Rise and Fall
- Buffer registers
- 2 – Bit synchronous counter
- Count Modes
- Single Up Count-Control Line
- Individual Asynchronous Resets
- Divide a clock signal by 2 or 4
- Digital electronics systems
- Load Control
