SN74AUC1G74YEPR
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-XFBGA, DSBGA |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tape & Reel (TR) |
| Series | 74AUC |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 8 |
| Type | D-Type |
| Subcategory | FF/Latches |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | 74AUC1G74 |
| JESD-30 Code | R-XBGA-B8 |
| Function | Set(Preset) and Reset |
| Qualification Status | Not Qualified |
| Output Type | Differential |
| Number of Elements | 1 |
| Polarity | Non-Inverting |
| Supply Voltage-Max (Vsup) | 2.7V |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Bits | 1 |
| Clock Frequency | 275MHz |
| Turn On Delay Time | 9.5 ns |
| Family | AUC |
| Logic Function | AND |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.005 A |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 3.8 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Propagation Delay (tpd) | 3.8 ns |
| fmax-Min | 275 MHz |
| Clock Edge Trigger Type | Positive Edge |
| Max Frequency@Nom-Sup | 200000000Hz |
| Height Seated (Max) | 0.5mm |
| Width | 0.9mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
SN74AUC1G74YEPR Overview
8-XFBGA, DSBGAis the way it is packaged. It is contained within the Tape & Reel (TR)package. T flip flop uses Differentialas the output. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. A 0.8V~2.7Vsupply voltage is required for it to operate. A temperature of -40°C~85°C TAis used in the operation. The type of this D latch is D-Type. This type of FPGA is a part of the 74AUC series. You should not exceed 275MHzin its output frequency. In total, it contains 1 elements. Despite external influences, it consumes 10μAof quiescent current. There are 8 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. It is a member of the 74AUC1G74 family. It is powered from a supply voltage of 1.2V. Its input capacitance is 2.5pFfarads. It belongs to the family of electronic devices known as AUC. Electronic part Surface Mountis mounted in the way. In this device, the clock edge trigger type is Positive Edge. This part is included in FF/Latches. There are 1bits in this flip flop. In this case, the maximum supply voltage (Vsup) reaches 2.7V. For normal operation, the supply voltage (Vsup) should be kept above 0.8V.
SN74AUC1G74YEPR Features
Tape & Reel (TR) package
74AUC series
1 Bits
SN74AUC1G74YEPR Applications
There are a lot of Texas Instruments SN74AUC1G74YEPR Flip Flops applications.
- Consumer
- Memory
- Differential Individual
- Communications
- Set-reset capability
- Registers
- QML qualified product
- Individual Asynchronous Resets
- Clock pulse
- ESD protection
