SN74AUC1G79DCKR
| Parameters | |
|---|---|
| Packaging | Cut Tape (CT) |
| Series | 74AUC |
| JESD-609 Code | e4 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 5 |
| ECCN Code | EAR99 |
| Type | D-Type |
| Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Subcategory | FF/Latches |
| Packing Method | TR |
| Technology | CMOS |
| Voltage - Supply | 0.8V~2.7V |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Base Part Number | 74AUC1G79 |
| Function | Standard |
| Output Type | Non-Inverted |
| Polarity | Non-Inverting |
| Supply Voltage-Min (Vsup) | 0.8V |
| Number of Circuits | 1 |
| Output Current | 9mA |
| Number of Bits | 1 |
| Clock Frequency | 275MHz |
| Propagation Delay | 2.4 ns |
| Turn On Delay Time | 5 ns |
| Family | AUC |
| Logic Function | D-Type, Flip-Flop |
| Current - Quiescent (Iq) | 10μA |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 9mA 9mA |
| Max I(ol) | 0.009 A |
| Max Propagation Delay @ V, Max CL | 1.8ns @ 2.5V, 30pF |
| Prop. Delay@Nom-Sup | 3.9 ns |
| Trigger Type | Positive Edge |
| Input Capacitance | 2.5pF |
| Number of Input Lines | 2 |
| Clock Edge Trigger Type | Positive Edge |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Thickness | 900μm |
| Radiation Hardening | No |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 1 Week |
| Lifecycle Status | ACTIVE (Last Updated: 4 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 5-TSSOP, SC-70-5, SOT-353 |
| Number of Pins | 5 |
| Weight | 2.494758mg |
| Operating Temperature | -40°C~85°C TA |
SN74AUC1G79DCKR Overview
The flip flop is packaged in a case of 5-TSSOP, SC-70-5, SOT-353. A package named Cut Tape (CT)includes it. It is configured with Non-Invertedas an output. There is a trigger configured with Positive Edge. The electronic part is mounted in the way of Surface Mount. A voltage of 0.8V~2.7Vis required for its operation. A temperature of -40°C~85°C TAis used in the operation. A flip flop of this type is classified as a D-Type. In FPGA terms, D flip flop is a type of 74AUCseries FPGA. It should not exceed 275MHzin terms of its output frequency. As a result, it consumes 10μA quiescent current and is not affected by external forces. Currently, there are 5 terminations. JK flip flop belongs to 74AUC1G79 family. It is powered from a supply voltage of 1.2V. There is 2.5pF input capacitance for this T flip flop. Electronic devices of this type belong to the AUCfamily. It is mounted by the way of Surface Mount. A total of 5pins are provided on this board. It has a clock edge trigger type of Positive Edge. It is part of the FF/Latchesbase part number family. It is designed with a number of bits of 1. It is imperative that the supply voltage (Vsup) is maintained above 0.8Vin order to ensure normal operation. The superior flexibility of this circuit is achieved by using 1 circuits. In light of its reliable performance, this T flip flop is well suited for TR. In addition to its maximum design flexibility, the output current of the T flip flop is 9mA. A total of 2input lines have been provided.
SN74AUC1G79DCKR Features
Cut Tape (CT) package
74AUC series
5 pins
1 Bits
SN74AUC1G79DCKR Applications
There are a lot of Texas Instruments SN74AUC1G79DCKR Flip Flops applications.
- Power down protection
- Guaranteed simultaneous switching noise level
- Frequency Dividers
- Test & Measurement
- ESD protection
- Computing
- Counters
- Control circuits
- Storage registers
- Convert a momentary switch to a toggle switch
